forked from OSchip/llvm-project
AMDGPU/GlobalISel: RegBankSelect for some easy intrinsics
llvm-svn: 364697
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@ -1453,8 +1453,55 @@ AMDGPURegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
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return getInvalidInstructionMapping();
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case Intrinsic::maxnum:
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case Intrinsic::minnum:
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case Intrinsic::amdgcn_cvt_pkrtz:
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case Intrinsic::amdgcn_div_fmas:
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case Intrinsic::amdgcn_trig_preop:
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case Intrinsic::amdgcn_sin:
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case Intrinsic::amdgcn_cos:
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case Intrinsic::amdgcn_log_clamp:
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case Intrinsic::amdgcn_rcp:
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case Intrinsic::amdgcn_rcp_legacy:
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case Intrinsic::amdgcn_rsq:
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case Intrinsic::amdgcn_rsq_legacy:
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case Intrinsic::amdgcn_rsq_clamp:
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case Intrinsic::amdgcn_ldexp:
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case Intrinsic::amdgcn_frexp_mant:
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case Intrinsic::amdgcn_frexp_exp:
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case Intrinsic::amdgcn_fract:
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case Intrinsic::amdgcn_cvt_pkrtz:
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case Intrinsic::amdgcn_cvt_pknorm_i16:
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case Intrinsic::amdgcn_cvt_pknorm_u16:
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case Intrinsic::amdgcn_cvt_pk_i16:
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case Intrinsic::amdgcn_cvt_pk_u16:
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case Intrinsic::amdgcn_fmed3:
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case Intrinsic::amdgcn_cubeid:
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case Intrinsic::amdgcn_cubema:
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case Intrinsic::amdgcn_cubesc:
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case Intrinsic::amdgcn_cubetc:
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case Intrinsic::amdgcn_sffbh:
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case Intrinsic::amdgcn_fmad_ftz:
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case Intrinsic::amdgcn_mbcnt_lo:
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case Intrinsic::amdgcn_mbcnt_hi:
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case Intrinsic::amdgcn_ubfe:
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case Intrinsic::amdgcn_sbfe:
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case Intrinsic::amdgcn_lerp:
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case Intrinsic::amdgcn_sad_u8:
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case Intrinsic::amdgcn_msad_u8:
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case Intrinsic::amdgcn_sad_hi_u8:
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case Intrinsic::amdgcn_sad_u16:
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case Intrinsic::amdgcn_qsad_pk_u16_u8:
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case Intrinsic::amdgcn_mqsad_pk_u16_u8:
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case Intrinsic::amdgcn_mqsad_u32_u8:
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case Intrinsic::amdgcn_cvt_pk_u8_f32:
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case Intrinsic::amdgcn_alignbit:
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case Intrinsic::amdgcn_alignbyte:
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case Intrinsic::amdgcn_fdot2:
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case Intrinsic::amdgcn_sdot2:
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case Intrinsic::amdgcn_udot2:
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case Intrinsic::amdgcn_sdot4:
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case Intrinsic::amdgcn_udot4:
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case Intrinsic::amdgcn_sdot8:
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case Intrinsic::amdgcn_udot8:
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case Intrinsic::amdgcn_fdiv_fast:
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return getDefaultMappingVOP(MI);
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case Intrinsic::amdgcn_kernarg_segment_ptr:
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case Intrinsic::amdgcn_s_getpc:
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