forked from OSchip/llvm-project
[X86] Add test cases to show missed opportunities to use 512-bit PSUBUS.
llvm-svn: 340127
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@ -1125,6 +1125,129 @@ vector.ph:
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ret <8 x i16> %res
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}
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define <64 x i8> @test17(<64 x i8> %x, i8 zeroext %w) nounwind {
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; SSE2-LABEL: test17:
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; SSE2: # %bb.0: # %vector.ph
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; SSE2-NEXT: movd %edi, %xmm4
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; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
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; SSE2-NEXT: pshuflw {{.*#+}} xmm4 = xmm4[0,0,2,3,4,5,6,7]
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; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,0,0,0]
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; SSE2-NEXT: psubusb %xmm4, %xmm0
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; SSE2-NEXT: psubusb %xmm4, %xmm1
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; SSE2-NEXT: psubusb %xmm4, %xmm2
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; SSE2-NEXT: psubusb %xmm4, %xmm3
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; SSE2-NEXT: retq
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;
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; SSSE3-LABEL: test17:
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; SSSE3: # %bb.0: # %vector.ph
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; SSSE3-NEXT: movd %edi, %xmm4
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; SSSE3-NEXT: pxor %xmm5, %xmm5
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; SSSE3-NEXT: pshufb %xmm5, %xmm4
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; SSSE3-NEXT: psubusb %xmm4, %xmm0
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; SSSE3-NEXT: psubusb %xmm4, %xmm1
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; SSSE3-NEXT: psubusb %xmm4, %xmm2
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; SSSE3-NEXT: psubusb %xmm4, %xmm3
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; SSSE3-NEXT: retq
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;
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; SSE41-LABEL: test17:
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; SSE41: # %bb.0: # %vector.ph
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; SSE41-NEXT: movd %edi, %xmm4
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; SSE41-NEXT: pxor %xmm5, %xmm5
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; SSE41-NEXT: pshufb %xmm5, %xmm4
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; SSE41-NEXT: psubusb %xmm4, %xmm0
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; SSE41-NEXT: psubusb %xmm4, %xmm1
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; SSE41-NEXT: psubusb %xmm4, %xmm2
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; SSE41-NEXT: psubusb %xmm4, %xmm3
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; SSE41-NEXT: retq
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;
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; AVX1-LABEL: test17:
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; AVX1: # %bb.0: # %vector.ph
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; AVX1-NEXT: vmovd %edi, %xmm2
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; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3
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; AVX1-NEXT: vpshufb %xmm3, %xmm2, %xmm2
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; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
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; AVX1-NEXT: vpsubusb %xmm2, %xmm3, %xmm3
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; AVX1-NEXT: vpsubusb %xmm2, %xmm0, %xmm0
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; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm0, %ymm0
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; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3
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; AVX1-NEXT: vpsubusb %xmm2, %xmm3, %xmm3
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; AVX1-NEXT: vpsubusb %xmm2, %xmm1, %xmm1
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; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm1
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: test17:
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; AVX2: # %bb.0: # %vector.ph
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; AVX2-NEXT: vmovd %edi, %xmm2
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; AVX2-NEXT: vpbroadcastb %xmm2, %ymm2
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; AVX2-NEXT: vpsubusb %ymm2, %ymm0, %ymm0
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; AVX2-NEXT: vpsubusb %ymm2, %ymm1, %ymm1
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; AVX2-NEXT: retq
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;
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; AVX512-LABEL: test17:
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; AVX512: # %bb.0: # %vector.ph
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; AVX512-NEXT: vpbroadcastb %edi, %zmm1
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; AVX512-NEXT: vpcmpnltub %zmm1, %zmm0, %k1
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; AVX512-NEXT: vpsubb %zmm1, %zmm0, %zmm0 {%k1} {z}
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; AVX512-NEXT: retq
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vector.ph:
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%0 = insertelement <64 x i8> undef, i8 %w, i32 0
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%broadcast15 = shufflevector <64 x i8> %0, <64 x i8> undef, <64 x i32> zeroinitializer
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%1 = icmp ult <64 x i8> %x, %broadcast15
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%2 = sub <64 x i8> %x, %broadcast15
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%res = select <64 x i1> %1, <64 x i8> zeroinitializer, <64 x i8> %2
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ret <64 x i8> %res
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}
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define <32 x i16> @test18(<32 x i16> %x, i16 zeroext %w) nounwind {
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; SSE-LABEL: test18:
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; SSE: # %bb.0: # %vector.ph
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; SSE-NEXT: movd %edi, %xmm4
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; SSE-NEXT: pshuflw {{.*#+}} xmm4 = xmm4[0,0,2,3,4,5,6,7]
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; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,0,0,0]
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; SSE-NEXT: psubusw %xmm4, %xmm0
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; SSE-NEXT: psubusw %xmm4, %xmm1
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; SSE-NEXT: psubusw %xmm4, %xmm2
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; SSE-NEXT: psubusw %xmm4, %xmm3
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; SSE-NEXT: retq
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;
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; AVX1-LABEL: test18:
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; AVX1: # %bb.0: # %vector.ph
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; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
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; AVX1-NEXT: vmovd %edi, %xmm3
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; AVX1-NEXT: vpshuflw {{.*#+}} xmm3 = xmm3[0,0,2,3,4,5,6,7]
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; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[0,0,0,0]
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; AVX1-NEXT: vpsubusw %xmm3, %xmm2, %xmm2
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; AVX1-NEXT: vpsubusw %xmm3, %xmm0, %xmm0
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; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
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; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
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; AVX1-NEXT: vpsubusw %xmm3, %xmm2, %xmm2
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; AVX1-NEXT: vpsubusw %xmm3, %xmm1, %xmm1
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; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: test18:
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; AVX2: # %bb.0: # %vector.ph
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; AVX2-NEXT: vmovd %edi, %xmm2
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; AVX2-NEXT: vpbroadcastw %xmm2, %ymm2
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; AVX2-NEXT: vpsubusw %ymm2, %ymm0, %ymm0
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; AVX2-NEXT: vpsubusw %ymm2, %ymm1, %ymm1
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; AVX2-NEXT: retq
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;
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; AVX512-LABEL: test18:
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; AVX512: # %bb.0: # %vector.ph
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; AVX512-NEXT: vpbroadcastw %edi, %zmm1
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; AVX512-NEXT: vpcmpnltuw %zmm1, %zmm0, %k1
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; AVX512-NEXT: vpsubw %zmm1, %zmm0, %zmm0 {%k1} {z}
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; AVX512-NEXT: retq
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vector.ph:
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%0 = insertelement <32 x i16> undef, i16 %w, i32 0
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%broadcast15 = shufflevector <32 x i16> %0, <32 x i16> undef, <32 x i32> zeroinitializer
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%1 = icmp ult <32 x i16> %x, %broadcast15
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%2 = sub <32 x i16> %x, %broadcast15
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%res = select <32 x i1> %1, <32 x i16> zeroinitializer, <32 x i16> %2
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ret <32 x i16> %res
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}
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define <8 x i16> @psubus_8i16_max(<8 x i16> %x, <8 x i16> %y) nounwind {
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; SSE-LABEL: psubus_8i16_max:
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; SSE: # %bb.0: # %vector.ph
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