forked from OSchip/llvm-project
[MCInstPrinter] Add parameter `Address` to MCInstPrinter::printAliasInstr. NFC
Follow-up of D72172.
This commit is contained in:
parent
1fb4f99a21
commit
b3cc5dcef0
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@ -295,7 +295,7 @@ void AArch64InstPrinter::printInst(const MCInst *MI, uint64_t Address,
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return;
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}
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if (!printAliasInstr(MI, STI, O))
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if (!printAliasInstr(MI, Address, STI, O))
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printInstruction(MI, Address, STI, O);
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printAnnotation(O, Annot);
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@ -32,8 +32,8 @@ public:
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// Autogenerated by tblgen.
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virtual void printInstruction(const MCInst *MI, uint64_t Address,
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const MCSubtargetInfo &STI, raw_ostream &O);
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virtual bool printAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI,
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raw_ostream &O);
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virtual bool printAliasInstr(const MCInst *MI, uint64_t Address,
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const MCSubtargetInfo &STI, raw_ostream &O);
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virtual void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx,
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unsigned PrintMethodIdx,
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const MCSubtargetInfo &STI,
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@ -205,8 +205,8 @@ public:
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void printInstruction(const MCInst *MI, uint64_t Address,
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const MCSubtargetInfo &STI, raw_ostream &O) override;
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bool printAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI,
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raw_ostream &O) override;
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bool printAliasInstr(const MCInst *MI, uint64_t Address,
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const MCSubtargetInfo &STI, raw_ostream &O) override;
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void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx,
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unsigned PrintMethodIdx,
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const MCSubtargetInfo &STI,
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@ -288,7 +288,7 @@ void ARMInstPrinter::printInst(const MCInst *MI, uint64_t Address,
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case ARM::t2DSB:
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switch (MI->getOperand(0).getImm()) {
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default:
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if (!printAliasInstr(MI, STI, O))
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if (!printAliasInstr(MI, Address, STI, O))
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printInstruction(MI, Address, STI, O);
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break;
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case 0:
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@ -302,7 +302,7 @@ void ARMInstPrinter::printInst(const MCInst *MI, uint64_t Address,
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return;
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}
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if (!printAliasInstr(MI, STI, O))
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if (!printAliasInstr(MI, Address, STI, O))
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printInstruction(MI, Address, STI, O);
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printAnnotation(O, Annot);
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@ -32,8 +32,8 @@ public:
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// Autogenerated by tblgen.
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void printInstruction(const MCInst *MI, uint64_t Address,
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const MCSubtargetInfo &STI, raw_ostream &O);
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virtual bool printAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI,
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raw_ostream &O);
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virtual bool printAliasInstr(const MCInst *MI, uint64_t Address,
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const MCSubtargetInfo &STI, raw_ostream &O);
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virtual void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx,
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unsigned PrintMethodIdx,
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const MCSubtargetInfo &STI,
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@ -78,7 +78,7 @@ void AVRInstPrinter::printInst(const MCInst *MI, uint64_t Address,
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printOperand(MI, 2, O);
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break;
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default:
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if (!printAliasInstr(MI, O))
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if (!printAliasInstr(MI, Address, O))
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printInstruction(MI, Address, O);
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printAnnotation(O, Annot);
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@ -46,7 +46,7 @@ private:
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// Autogenerated by TableGen.
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void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O);
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bool printAliasInstr(const MCInst *MI, raw_ostream &O);
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bool printAliasInstr(const MCInst *MI, uint64_t Address, raw_ostream &O);
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void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx,
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unsigned PrintMethodIdx, raw_ostream &O);
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};
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@ -141,7 +141,7 @@ void LanaiInstPrinter::printInst(const MCInst *MI, uint64_t Address,
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StringRef Annotation,
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const MCSubtargetInfo & /*STI*/,
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raw_ostream &OS) {
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if (!printAlias(MI, OS) && !printAliasInstr(MI, OS))
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if (!printAlias(MI, OS) && !printAliasInstr(MI, Address, OS))
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printInstruction(MI, Address, OS);
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printAnnotation(OS, Annotation);
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}
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@ -44,7 +44,7 @@ public:
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// Autogenerated by tblgen.
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void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O);
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bool printAliasInstr(const MCInst *MI, raw_ostream &OS);
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bool printAliasInstr(const MCInst *MI, uint64_t Address, raw_ostream &OS);
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void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx,
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unsigned PrintMethodIdx, raw_ostream &O);
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static const char *getRegisterName(unsigned RegNo);
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@ -29,7 +29,7 @@ using namespace llvm;
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void MSP430InstPrinter::printInst(const MCInst *MI, uint64_t Address,
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StringRef Annot, const MCSubtargetInfo &STI,
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raw_ostream &O) {
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if (!printAliasInstr(MI, O))
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if (!printAliasInstr(MI, Address, O))
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printInstruction(MI, Address, O);
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printAnnotation(O, Annot);
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}
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@ -27,7 +27,7 @@ namespace llvm {
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// Autogenerated by tblgen.
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void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O);
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bool printAliasInstr(const MCInst *MI, raw_ostream &O);
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bool printAliasInstr(const MCInst *MI, uint64_t Address, raw_ostream &O);
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void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx,
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unsigned PrintMethodIdx, raw_ostream &O);
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static const char *getRegisterName(unsigned RegNo);
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@ -109,7 +109,7 @@ void MipsInstPrinter::printInst(const MCInst *MI, uint64_t Address,
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}
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// Try to print any aliases first.
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if (!printAliasInstr(MI, O) && !printAlias(*MI, O))
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if (!printAliasInstr(MI, Address, O) && !printAlias(*MI, O))
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printInstruction(MI, Address, O);
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printAnnotation(O, Annot);
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@ -86,7 +86,7 @@ public:
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void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
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const MCSubtargetInfo &STI, raw_ostream &O) override;
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bool printAliasInstr(const MCInst *MI, raw_ostream &OS);
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bool printAliasInstr(const MCInst *MI, uint64_t Address, raw_ostream &OS);
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void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx,
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unsigned PrintMethodIdx, raw_ostream &O);
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@ -193,7 +193,7 @@ void PPCInstPrinter::printInst(const MCInst *MI, uint64_t Address,
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}
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}
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if (!printAliasInstr(MI, O))
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if (!printAliasInstr(MI, Address, O))
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printInstruction(MI, Address, O);
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printAnnotation(O, Annot);
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}
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@ -39,7 +39,7 @@ public:
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void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O);
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static const char *getRegisterName(unsigned RegNo);
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bool printAliasInstr(const MCInst *MI, raw_ostream &OS);
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bool printAliasInstr(const MCInst *MI, uint64_t Address, raw_ostream &OS);
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void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx,
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unsigned PrintMethodIdx,
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raw_ostream &OS);
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@ -73,7 +73,7 @@ void RISCVInstPrinter::printInst(const MCInst *MI, uint64_t Address,
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Res = uncompressInst(UncompressedMI, *MI, MRI, STI);
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if (Res)
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NewMI = const_cast<MCInst *>(&UncompressedMI);
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if (NoAliases || !printAliasInstr(NewMI, STI, O))
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if (NoAliases || !printAliasInstr(NewMI, Address, STI, O))
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printInstruction(NewMI, Address, STI, O);
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printAnnotation(O, Annot);
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}
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@ -45,8 +45,8 @@ public:
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// Autogenerated by tblgen.
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void printInstruction(const MCInst *MI, uint64_t Address,
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const MCSubtargetInfo &STI, raw_ostream &O);
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bool printAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI,
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raw_ostream &O);
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bool printAliasInstr(const MCInst *MI, uint64_t Address,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx,
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unsigned PrintMethodIdx,
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const MCSubtargetInfo &STI, raw_ostream &O);
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@ -46,7 +46,8 @@ void SparcInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const
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void SparcInstPrinter::printInst(const MCInst *MI, uint64_t Address,
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StringRef Annot, const MCSubtargetInfo &STI,
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raw_ostream &O) {
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if (!printAliasInstr(MI, STI, O) && !printSparcAliasInstr(MI, STI, O))
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if (!printAliasInstr(MI, Address, STI, O) &&
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!printSparcAliasInstr(MI, STI, O))
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printInstruction(MI, Address, STI, O);
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printAnnotation(O, Annot);
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}
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@ -33,8 +33,8 @@ public:
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// Autogenerated by tblgen.
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void printInstruction(const MCInst *MI, uint64_t Address,
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const MCSubtargetInfo &STI, raw_ostream &O);
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bool printAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI,
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raw_ostream &O);
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bool printAliasInstr(const MCInst *MI, uint64_t Address,
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const MCSubtargetInfo &STI, raw_ostream &O);
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void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx,
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unsigned PrintMethodIdx,
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const MCSubtargetInfo &STI, raw_ostream &O);
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@ -42,7 +42,7 @@ void VEInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
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void VEInstPrinter::printInst(const MCInst *MI, uint64_t Address,
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StringRef Annot, const MCSubtargetInfo &STI,
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raw_ostream &OS) {
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if (!printAliasInstr(MI, STI, OS))
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if (!printAliasInstr(MI, Address, STI, OS))
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printInstruction(MI, Address, STI, OS);
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printAnnotation(OS, Annot);
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}
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@ -28,7 +28,8 @@ public:
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const MCSubtargetInfo &STI, raw_ostream &OS) override;
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// Autogenerated by tblgen.
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bool printAliasInstr(const MCInst *, const MCSubtargetInfo &, raw_ostream &);
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bool printAliasInstr(const MCInst *, uint64_t Address,
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const MCSubtargetInfo &, raw_ostream &);
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void printInstruction(const MCInst *, uint64_t, const MCSubtargetInfo &,
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raw_ostream &);
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static const char *getRegisterName(unsigned RegNo);
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@ -68,8 +68,7 @@ void X86ATTInstPrinter::printInst(const MCInst *MI, uint64_t Address,
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OS << "\tdata32";
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}
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// Try to print any aliases first.
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else if (!printAliasInstr(MI, OS) &&
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!printVecCompareInstr(MI, OS))
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else if (!printAliasInstr(MI, Address, OS) && !printVecCompareInstr(MI, OS))
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printInstruction(MI, Address, OS);
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// Next always print the annotation.
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@ -30,7 +30,7 @@ public:
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// Autogenerated by tblgen, returns true if we successfully printed an
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// alias.
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bool printAliasInstr(const MCInst *MI, raw_ostream &OS);
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bool printAliasInstr(const MCInst *MI, uint64_t Address, raw_ostream &OS);
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void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx,
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unsigned PrintMethodIdx, raw_ostream &O);
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@ -45,8 +45,7 @@ void X86IntelInstPrinter::printInst(const MCInst *MI, uint64_t Address,
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if (MI->getOpcode() == X86::DATA16_PREFIX &&
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STI.getFeatureBits()[X86::Mode16Bit]) {
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OS << "\tdata32";
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} else if (!printAliasInstr(MI, OS) &&
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!printVecCompareInstr(MI, OS))
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} else if (!printAliasInstr(MI, Address, OS) && !printVecCompareInstr(MI, OS))
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printInstruction(MI, Address, OS);
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// Next always print the annotation.
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@ -31,7 +31,7 @@ public:
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// Autogenerated by tblgen, returns true if we successfully printed an
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// alias.
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bool printAliasInstr(const MCInst *MI, raw_ostream &OS);
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bool printAliasInstr(const MCInst *MI, uint64_t Address, raw_ostream &OS);
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void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx,
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unsigned PrintMethodIdx, raw_ostream &O);
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@ -985,7 +985,8 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
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HeaderO << "bool " << Target.getName() << ClassName
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<< "::printAliasInstr(const MCInst"
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<< " *MI, " << (PassSubtarget ? "const MCSubtargetInfo &STI, " : "")
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<< " *MI, uint64_t Address, "
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<< (PassSubtarget ? "const MCSubtargetInfo &STI, " : "")
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<< "raw_ostream &OS) {\n";
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std::string PatternsForOpcode;
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