maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

Do not use wrapping ranges to bound non-affine accesses 

When deriving the range of valid values of a scalar evolution expression might
be a range [12, 8), where the upper bound is smaller than the lower bound and
where the range is expected to possibly wrap around. We theoretically could
model such a range as a union of two non-wrapping ranges, but do not do this
as of yet. Instead, we just do not derive any bounds. Before this change,
we could have obtained bounds where the maximal possible value is strictly
smaller than the minimal possible value, which is incorrect and also caused
assertions during scop modeling.

llvm-svn: 294891
This commit is contained in:
Tobias Grosser 2017-02-12 08:11:12 +00:00
parent 5d91ab46c0
commit b3a85884f7
11 changed files with 58 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
polly/lib/Analysis/ScopInfo.cpp
View File

@ -725,7 +725,11 @@ void MemoryAccess::computeBoundsOnAccessRelation(unsigned ElementSize) {
if (Range.isFullSet())
return;
if (Range.isWrappedSet())
return;
bool isWrapping = Range.isSignWrappedSet();
unsigned BW = Range.getBitWidth();
const auto One = APInt(BW, 1);
const auto LB = isWrapping ? Range.getLower() : Range.getSignedMin();
@ -734,6 +738,8 @@ void MemoryAccess::computeBoundsOnAccessRelation(unsigned ElementSize) {
auto Min = LB.sdiv(APInt(BW, ElementSize));
auto Max = UB.sdiv(APInt(BW, ElementSize)) + One;
assert(Min.sle(Max) && "Minimum expected to be less or equal than max");
isl_set *AccessRange = isl_map_range(isl_map_copy(AccessRelation));
AccessRange =
addRangeBoundsToSet(AccessRange, ConstantRange(Min, Max), 0, isl_dim_set);

4
polly/test/ScopInfo/NonAffine/non-affine-loop-condition-dependent-access_1.ll
View File

@ -37,9 +37,9 @@
; SCALAR-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; SCALAR-NEXT: { Stmt_bb3__TO__bb11[i0] -> MemRef_C[i0] };
; SCALAR-NEXT: ReadAccess := [Reduction Type: +] [Scalar: 0]
; SCALAR-NEXT: { Stmt_bb3__TO__bb11[i0] -> MemRef_A[o0] : -2147483648 <= o0 <= 2147483647 };
; SCALAR-NEXT: { Stmt_bb3__TO__bb11[i0] -> MemRef_A[o0] };
; SCALAR-NEXT: MayWriteAccess := [Reduction Type: +] [Scalar: 0]
; SCALAR-NEXT: { Stmt_bb3__TO__bb11[i0] -> MemRef_A[o0] : -2147483648 <= o0 <= 2147483647 };
; SCALAR-NEXT: { Stmt_bb3__TO__bb11[i0] -> MemRef_A[o0] };
; SCALAR-NEXT: }
; PROFIT-NOT: Statements

2
polly/test/ScopInfo/NonAffine/non_affine_loop_used_later.ll
View File

@ -73,7 +73,7 @@
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N] -> { Stmt_bb18[i0] -> MemRef_j_2__phi[] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_bb18[i0] -> MemRef_A[o0] : -2147483648 <= o0 <= 2147483647 };
; CHECK-NEXT: [N] -> { Stmt_bb18[i0] -> MemRef_A[o0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_bb18[i0] -> MemRef_A[i0] };
; CHECK-NEXT: Stmt_bb23

2
polly/test/ScopInfo/NonAffine/non_affine_parametric_loop.ll
View File

@ -35,5 +35,5 @@ for.end:
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [n] -> { Stmt_for_body[i0] -> MemRef_INDEX[i0] };
; CHECK-NEXT: MayWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [n] -> { Stmt_for_body[i0] -> MemRef_A[o0] : -1152921504606846976 <= o0 <= 1152921504606846975 };
; CHECK-NEXT: [n] -> { Stmt_for_body[i0] -> MemRef_A[o0] };
; CHECK-NEXT: }

2
polly/test/ScopInfo/multidim_2d_with_modref_call.ll
View File

@ -113,7 +113,7 @@
; NONAFFINE-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; NONAFFINE-NEXT: [tmp9, tmp14] -> { Stmt_bb17[i0, i1] -> MemRef_tmp8[] };
; NONAFFINE-NEXT: MayWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; NONAFFINE-NEXT: [tmp9, tmp14] -> { Stmt_bb17[i0, i1] -> MemRef_arg4[o0] : -1152921504606846976 <= o0 <= 1152921504606846975 };
; NONAFFINE-NEXT: [tmp9, tmp14] -> { Stmt_bb17[i0, i1] -> MemRef_arg4[o0] };
; NONAFFINE-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; NONAFFINE-NEXT: [tmp9, tmp14] -> { Stmt_bb17[i0, i1] -> MemRef_arg1[o0] };
; NONAFFINE-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]

2
polly/test/ScopInfo/multidim_2d_with_modref_call_2.ll
View File

@ -113,7 +113,7 @@
; NONAFFINE-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; NONAFFINE-NEXT: [tmp9, tmp14] -> { Stmt_bb17[i0, i1] -> MemRef_arg4[o0] };
; NONAFFINE-NEXT: MayWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; NONAFFINE-NEXT: [tmp9, tmp14] -> { Stmt_bb17[i0, i1] -> MemRef_arg4[o0] : -1152921504606846976 <= o0 <= 1152921504606846975 };
; NONAFFINE-NEXT: [tmp9, tmp14] -> { Stmt_bb17[i0, i1] -> MemRef_arg4[o0] };
; NONAFFINE-NEXT: }
target datalayout = "e-p:64:64:64-S128-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f16:16:16-f32:32:32-f64:64:64-f128:128:128-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"

2
polly/test/ScopInfo/multidim_fortran_2d_with_modref_call.ll
View File

@ -112,7 +112,7 @@
; NONAFFINE-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; NONAFFINE-NEXT: [tmp9, tmp14] -> { Stmt_bb17[i0, i1] -> MemRef_tmp8[] };
; NONAFFINE-NEXT: MayWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; NONAFFINE-NEXT: [tmp9, tmp14] -> { Stmt_bb17[i0, i1] -> MemRef_arg4[o0] : -1152921504606846976 <= o0 <= 1152921504606846975 };
; NONAFFINE-NEXT: [tmp9, tmp14] -> { Stmt_bb17[i0, i1] -> MemRef_arg4[o0] };
; NONAFFINE-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; NONAFFINE-NEXT: [tmp9, tmp14] -> { Stmt_bb17[i0, i1] -> MemRef_arg1[o0] };
; NONAFFINE-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]

2
polly/test/ScopInfo/multidim_single_and_multidim_array.ll
View File

@ -33,7 +33,7 @@ target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
; NONAFFINE-NEXT: Schedule :=
; NONAFFINE-NEXT: [n, p_1] -> { Stmt_for_i_1[i0] -> [0, i0] };
; NONAFFINE-NEXT: MayWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; NONAFFINE-NEXT: [n, p_1] -> { Stmt_for_i_1[i0] -> MemRef_X[o0] : -2305843009213693952 <= o0 <= 2305843009213693951 };
; NONAFFINE-NEXT: [n, p_1] -> { Stmt_for_i_1[i0] -> MemRef_X[o0] };
; NONAFFINE-NEXT: Stmt_for_i_2
; NONAFFINE-NEXT: Domain :=
; NONAFFINE-NEXT: [n, p_1] -> { Stmt_for_i_2[i0] : 0 <= i0 < n };

2
polly/test/ScopInfo/non_affine_access.ll
View File

@ -30,4 +30,4 @@ for.end: ; preds = %for.body
}
; CHECK-NOT: Stmt_for_body
; NONAFFINE: { Stmt_for_body[i0] -> MemRef_A[o0] : -1152921504606846976 <= o0 <= 1152921504606846975 };
; NONAFFINE: { Stmt_for_body[i0] -> MemRef_A[o0] };

4
polly/test/ScopInfo/non_affine_region_1.ll
View File

@ -48,9 +48,9 @@
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [b] -> { Stmt_bb10__TO__bb18[i0] -> MemRef_x_1__phi[] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [b] -> { Stmt_bb10__TO__bb18[i0] -> MemRef_A[o0] : -2147483648 <= o0 <= 2147483647 };
; CHECK-NEXT: [b] -> { Stmt_bb10__TO__bb18[i0] -> MemRef_A[o0] };
; CHECK-NEXT: MayWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [b] -> { Stmt_bb10__TO__bb18[i0] -> MemRef_A[o0] : -2147483648 <= o0 <= 2147483647 };
; CHECK-NEXT: [b] -> { Stmt_bb10__TO__bb18[i0] -> MemRef_A[o0] };
; CHECK-NEXT: }
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"

41
polly/test/ScopInfo/ranged_parameter_2.ll Normal file
View File

@ -0,0 +1,41 @@
; RUN: opt %loadPolly -polly-scops -analyze -polly-allow-nonaffine < %s \
; RUN: -debug 2>&1 | FileCheck %s
; REQUIRES: asserts
; CHECK: Region: %bb1---%bb16
; CHECK: [n] -> { : 1 = 0 }
; This test case at some point caused an assertion when modeling a scop, due
; to use constructing an invalid lower and upper bound for the range of
; non-affine accesses.
target datalayout = "e-p:64:64:64-S128-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f16:16:16-f32:32:32-f64:64:64-f128:128:128-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
define void @zot(double* noalias %arg, double** %D, i32 %n) {
bb:
br label %bb1
bb1:
%tmp4 = load double*, double** %D
%tmp5 = add i64 undef, 3
%tmp6 = add i64 %tmp5, undef
%tmp7 = add i64 %tmp6, undef
%tmp8 = getelementptr double, double* %tmp4, i64 %tmp7
%tmp9 = bitcast double* %tmp8 to i64*
store i64 42, i64* %tmp9
br label %bb11
bb11:
%tmp12 = getelementptr double, double* %arg, i64 0
%tmp13 = bitcast double* %tmp12 to i64*
store i64 43, i64* %tmp13
br label %bb14
bb14:
%tmp15 = icmp eq i32 0, %n
br i1 %tmp15, label %bb16, label %bb1
bb16:
ret void
}