forked from OSchip/llvm-project
Add nonuniform vector trunc(or(shl(zext(x),c1),srl(zext(x),c2))) tests
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@ -500,6 +500,40 @@ define <2 x i16> @test40vec(<2 x i16> %a) {
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ret <2 x i16> %r
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ret <2 x i16> %r
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}
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}
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define <2 x i16> @test40vec_nonuniform(<2 x i16> %a) {
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; ALL-LABEL: @test40vec_nonuniform(
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; ALL-NEXT: [[T:%.*]] = zext <2 x i16> [[A:%.*]] to <2 x i32>
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; ALL-NEXT: [[T21:%.*]] = lshr <2 x i32> [[T]], <i32 9, i32 10>
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; ALL-NEXT: [[T5:%.*]] = shl <2 x i32> [[T]], <i32 8, i32 9>
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; ALL-NEXT: [[T32:%.*]] = or <2 x i32> [[T21]], [[T5]]
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; ALL-NEXT: [[R:%.*]] = trunc <2 x i32> [[T32]] to <2 x i16>
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; ALL-NEXT: ret <2 x i16> [[R]]
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;
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%t = zext <2 x i16> %a to <2 x i32>
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%t21 = lshr <2 x i32> %t, <i32 9, i32 10>
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%t5 = shl <2 x i32> %t, <i32 8, i32 9>
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%t32 = or <2 x i32> %t21, %t5
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%r = trunc <2 x i32> %t32 to <2 x i16>
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ret <2 x i16> %r
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}
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define <2 x i16> @test40vec_undef(<2 x i16> %a) {
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; ALL-LABEL: @test40vec_undef(
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; ALL-NEXT: [[T:%.*]] = zext <2 x i16> [[A:%.*]] to <2 x i32>
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; ALL-NEXT: [[T21:%.*]] = lshr <2 x i32> [[T]], <i32 9, i32 undef>
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; ALL-NEXT: [[T5:%.*]] = shl <2 x i32> [[T]], <i32 8, i32 undef>
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; ALL-NEXT: [[T32:%.*]] = or <2 x i32> [[T21]], [[T5]]
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; ALL-NEXT: [[R:%.*]] = trunc <2 x i32> [[T32]] to <2 x i16>
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; ALL-NEXT: ret <2 x i16> [[R]]
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;
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%t = zext <2 x i16> %a to <2 x i32>
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%t21 = lshr <2 x i32> %t, <i32 9, i32 undef>
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%t5 = shl <2 x i32> %t, <i32 8, i32 undef>
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%t32 = or <2 x i32> %t21, %t5
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%r = trunc <2 x i32> %t32 to <2 x i16>
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ret <2 x i16> %r
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}
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; PR1263
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; PR1263
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define i32* @test41(i32* %t1) {
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define i32* @test41(i32* %t1) {
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; ALL-LABEL: @test41(
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; ALL-LABEL: @test41(
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