forked from OSchip/llvm-project
IRgen/ABI/ARM: Trust the backend to pass vectors correctly for the given ABI.
- Therefore, we can lower out the NEON wrapper structs and pass the vectors directly. This makes a huge difference in the cleanliness of the IR after optimization. - I will trust, but verify, via future ABITest testing (for APCS-GNU, at least). llvm-svn: 114618
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@ -2272,6 +2272,17 @@ ABIArgInfo ARMABIInfo::classifyArgumentType(QualType Ty) const {
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if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty))
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return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
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// NEON vectors are implemented as (theoretically) opaque structures wrapping
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// the underlying vector type. We trust the backend to pass the underlying
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// vectors appropriately, so we can unwrap the structs which generally will
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// lead to much cleaner IR.
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if (const Type *SeltTy = isSingleElementStruct(Ty, getContext())) {
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if (SeltTy->isVectorType())
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return ABIArgInfo::getDirect(CGT.ConvertType(QualType(SeltTy, 0)));
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}
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// Otherwise, pass by coercing to a structure of the appropriate size.
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//
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// FIXME: This is kind of nasty... but there isn't much choice because the ARM
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// backend doesn't support byval.
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// FIXME: This doesn't handle alignment > 64 bits.
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@ -0,0 +1,13 @@
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// RUN: %clang_cc1 -triple thumbv7-apple-darwin9 \
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// RUN: -target-abi apcs-gnu \
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// RUN: -target-cpu cortex-a8 \
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// RUN: -mfloat-abi soft \
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// RUN: -target-feature +soft-float-abi \
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// RUN: -emit-llvm -w -o - %s | FileCheck %s
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#include <arm_neon.h>
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// CHECK: define void @f0(%struct.__simd128_int8_t* sret %agg.result, <16 x i8> %{{.*}}, <16 x i8> %{{.*}})
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int8x16_t f0(int8x16_t a0, int8x16_t a1) {
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return vzipq_s8(a0, a1).val[0];
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}
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