forked from OSchip/llvm-project
parent
27ba94bf3b
commit
b2bb4b4040
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@ -1332,14 +1332,6 @@ void X86RegisterInfo::emitEpilogue(MachineFunction &MF,
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NumBytes -= SlotSize;
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}
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// We're returning from function via eh_return.
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if (RetOpcode == X86::EH_RETURN) {
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MachineOperand &DestAddr = MBBI->getOperand(0);
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assert(DestAddr.isReg() && "Offset should be in register!");
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BuildMI(MBB, MBBI, TII.get(Is64Bit ? X86::MOV64rr : X86::MOV32rr),StackPtr).
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addReg(DestAddr.getReg());
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}
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// Skip the callee-saved pop instructions.
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while (MBBI != MBB.begin()) {
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MachineBasicBlock::iterator PI = prior(MBBI);
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@ -1355,7 +1347,7 @@ void X86RegisterInfo::emitEpilogue(MachineFunction &MF,
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MachineInstr *MI = addRegOffset(BuildMI(TII.get(Opc), StackPtr),
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FramePtr, -CSSize);
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MBB.insert(MBBI, MI);
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return;
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NumBytes = 0;
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}
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if (NumBytes) { // adjust stack pointer back: ESP += numbytes
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@ -1380,6 +1372,15 @@ void X86RegisterInfo::emitEpilogue(MachineFunction &MF,
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if (NumBytes)
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emitSPUpdate(MBB, MBBI, StackPtr, NumBytes, Is64Bit, TII);
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}
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// We're returning from function via eh_return.
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if (RetOpcode == X86::EH_RETURN) {
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MBBI = prior(MBB.end());
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MachineOperand &DestAddr = MBBI->getOperand(0);
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assert(DestAddr.isReg() && "Offset should be in register!");
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BuildMI(MBB, MBBI, TII.get(Is64Bit ? X86::MOV64rr : X86::MOV32rr),StackPtr).
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addReg(DestAddr.getReg());
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}
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}
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unsigned X86RegisterInfo::getRARegister() const {
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