forked from OSchip/llvm-project
[mlir][spirv] Fix bitcast input order for UnifyAliasedResourcePass
spv.bitcast from a vector to a scalar expects the lower-numbered components of the the vector to map to the lower-ordered bits of the scalar. That actually already matches how little endian stores data in the memory. So we just need to read and push to the back of the vector sequentially. Reviewed By: hanchung Differential Revision: https://reviews.llvm.org/D128473
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@ -455,12 +455,14 @@ struct ConvertLoad : public ConvertAliasResource<spirv::LoadOp> {
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indices.back(), oneValue);
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auto componentAcOp =
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rewriter.create<spirv::AccessChainOp>(loc, acOp.base_ptr(), indices);
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// Assuming little endian, this reads lower-ordered bits of the number to
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// lower-numbered components of the vector.
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components.push_back(rewriter.create<spirv::LoadOp>(loc, componentAcOp));
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}
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std::reverse(components.begin(), components.end()); // For little endian..
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// Create a vector of the components and then cast back to the larger
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// bitwidth element type.
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// bitwidth element type. For spv.bitcast, the lower-numbered components of
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// the vector map to lower-ordered bits of the larger bitwidth element type.
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auto vectorType = VectorType::get({ratio}, dstElemType);
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Value vectorValue = rewriter.create<spirv::CompositeConstructOp>(
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loc, vectorType, components);
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@ -251,7 +251,7 @@ spv.module Logical GLSL450 {
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// CHECK: %[[AC1:.+]] = spv.AccessChain %[[ADDR]][%[[ZERO]], %[[ADD]]]
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// CHECK: %[[LOAD1:.+]] = spv.Load "StorageBuffer" %[[AC1]] : f32
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// CHECK: %[[CC:.+]] = spv.CompositeConstruct %[[LOAD1]], %[[LOAD0]]
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// CHECK: %[[CC:.+]] = spv.CompositeConstruct %[[LOAD0]], %[[LOAD1]]
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// CHECK: %[[CAST:.+]] = spv.Bitcast %[[CC]] : vector<2xf32> to i64
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// CHECK: spv.ReturnValue %[[CAST]]
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