maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

[X86][BMI2] Regenerate mulx tests 

llvm-svn: 294598
This commit is contained in:
Simon Pilgrim 2017-02-09 17:54:51 +00:00
parent 7bcf46e29d
commit b25f60210f
2 changed files with 27 additions and 14 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

21
llvm/test/CodeGen/X86/mulx32.ll
View File

@ -1,22 +1,29 @@
; RUN: llc -mcpu=core-avx2 -march=x86 < %s | FileCheck %s ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-unknown -mattr=+bmi2 | FileCheck %s
; RUN: llc < %s -mtriple=i686-unknown -mcpu=core-avx2 | FileCheck %s
define i64 @f1(i32 %a, i32 %b) { define i64 @f1(i32 %a, i32 %b) {
; CHECK-LABEL: f1:
; CHECK: # BB#0:
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
; CHECK-NEXT: mulxl {{[0-9]+}}(%esp), %eax, %edx
; CHECK-NEXT: retl
%x = zext i32 %a to i64 %x = zext i32 %a to i64
%y = zext i32 %b to i64 %y = zext i32 %b to i64
%r = mul i64 %x, %y %r = mul i64 %x, %y
; CHECK: f1
; CHECK: mulxl
; CHECK: ret
ret i64 %r ret i64 %r
} }
define i64 @f2(i32 %a, i32* %p) { define i64 @f2(i32 %a, i32* %p) {
; CHECK-LABEL: f2:
; CHECK: # BB#0:
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
; CHECK-NEXT: mulxl (%eax), %eax, %edx
; CHECK-NEXT: retl
%b = load i32, i32* %p %b = load i32, i32* %p
%x = zext i32 %a to i64 %x = zext i32 %a to i64
%y = zext i32 %b to i64 %y = zext i32 %b to i64
%r = mul i64 %x, %y %r = mul i64 %x, %y
; CHECK: f2
; CHECK: mulxl ({{.+}}), %{{.+}}, %{{.+}}
; CHECK: ret
ret i64 %r ret i64 %r
} }

20
llvm/test/CodeGen/X86/mulx64.ll
View File

@ -1,22 +1,28 @@
; RUN: llc -mcpu=core-avx2 -march=x86-64 < %s | FileCheck %s ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+bmi2 | FileCheck %s
; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=core-avx2 | FileCheck %s
define i128 @f1(i64 %a, i64 %b) { define i128 @f1(i64 %a, i64 %b) {
; CHECK-LABEL: f1:
; CHECK: # BB#0:
; CHECK-NEXT: movq %rdi, %rdx
; CHECK-NEXT: mulxq %rsi, %rax, %rdx
; CHECK-NEXT: retq
%x = zext i64 %a to i128 %x = zext i64 %a to i128
%y = zext i64 %b to i128 %y = zext i64 %b to i128
%r = mul i128 %x, %y %r = mul i128 %x, %y
; CHECK: f1
; CHECK: mulxq
; CHECK: ret
ret i128 %r ret i128 %r
} }
define i128 @f2(i64 %a, i64* %p) { define i128 @f2(i64 %a, i64* %p) {
; CHECK-LABEL: f2:
; CHECK: # BB#0:
; CHECK-NEXT: movq %rdi, %rdx
; CHECK-NEXT: mulxq (%rsi), %rax, %rdx
; CHECK-NEXT: retq
%b = load i64, i64* %p %b = load i64, i64* %p
%x = zext i64 %a to i128 %x = zext i64 %a to i128
%y = zext i64 %b to i128 %y = zext i64 %b to i128
%r = mul i128 %x, %y %r = mul i128 %x, %y
; CHECK: f2
; CHECK: mulxq ({{.+}}), %{{.+}}, %{{.+}}
; CHECK: ret
ret i128 %r ret i128 %r
} }