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R600: Expand vector FRINT ops 

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
llvm-svn: 188598
This commit is contained in:
Tom Stellard 2013-08-16 23:51:33 +00:00
parent ad3aff246c
commit b249b75726
2 changed files with 55 additions and 0 deletions
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1
llvm/lib/Target/R600/AMDGPUISelLowering.cpp
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@ -154,6 +154,7 @@ AMDGPUTargetLowering::AMDGPUTargetLowering(TargetMachine &TM) :
setOperationAction(ISD::FDIV, VT, Expand); setOperationAction(ISD::FDIV, VT, Expand);
setOperationAction(ISD::FFLOOR, VT, Expand); setOperationAction(ISD::FFLOOR, VT, Expand);
setOperationAction(ISD::FMUL, VT, Expand); setOperationAction(ISD::FMUL, VT, Expand);
setOperationAction(ISD::FRINT, VT, Expand);
setOperationAction(ISD::FSUB, VT, Expand); setOperationAction(ISD::FSUB, VT, Expand);
} }
} }

54
llvm/test/CodeGen/R600/llvm.rint.ll Normal file
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@ -0,0 +1,54 @@
; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=R600-CHECK
; RUN: llc < %s -march=r600 -mcpu=SI | FileCheck %s --check-prefix=SI-CHECK
; R600-CHECK: @f32
; R600-CHECK: RNDNE
; SI-CHECK: @f32
; SI-CHECK: V_RNDNE_F32_e32
define void @f32(float addrspace(1)* %out, float %in) {
entry:
%0 = call float @llvm.rint.f32(float %in)
store float %0, float addrspace(1)* %out
ret void
}
; R600-CHECK: @v2f32
; R600-CHECK: RNDNE
; R600-CHECK: RNDNE
; SI-CHECK: @v2f32
; SI-CHECK: V_RNDNE_F32_e32
; SI-CHECK: V_RNDNE_F32_e32
define void @v2f32(<2 x float> addrspace(1)* %out, <2 x float> %in) {
entry:
%0 = call <2 x float> @llvm.rint.v2f32(<2 x float> %in)
store <2 x float> %0, <2 x float> addrspace(1)* %out
ret void
}
; R600-CHECK: @v4f32
; R600-CHECK: RNDNE
; R600-CHECK: RNDNE
; R600-CHECK: RNDNE
; R600-CHECK: RNDNE
; SI-CHECK: @v4f32
; SI-CHECK: V_RNDNE_F32_e32
; SI-CHECK: V_RNDNE_F32_e32
; SI-CHECK: V_RNDNE_F32_e32
; SI-CHECK: V_RNDNE_F32_e32
define void @v4f32(<4 x float> addrspace(1)* %out, <4 x float> %in) {
entry:
%0 = call <4 x float> @llvm.rint.v4f32(<4 x float> %in)
store <4 x float> %0, <4 x float> addrspace(1)* %out
ret void
}
; Function Attrs: nounwind readonly
declare float @llvm.rint.f32(float) #0
; Function Attrs: nounwind readonly
declare <2 x float> @llvm.rint.v2f32(<2 x float>) #0
; Function Attrs: nounwind readonly
declare <4 x float> @llvm.rint.v4f32(<4 x float>) #0
attributes #0 = { nounwind readonly }