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[VE] Specify to expand BRIND and BR_JT 

BRIND and BR_JT are not implmented yet, so expand them atm.
Add regression tests too.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D90283
This commit is contained in:
Kazushi (Jam) Marukawa 2020-10-24 22:00:15 +09:00
parent 7e2ffe7a63
commit b22e32a9c8
3 changed files with 112 additions and 0 deletions
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7
llvm/lib/Target/VE/VEISelLowering.cpp
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@ -721,8 +721,15 @@ VETargetLowering::VETargetLowering(const TargetMachine &TM,
/// } Stack
/// Branch {
// VE doesn't have BRCOND
setOperationAction(ISD::BRCOND, MVT::Other, Expand);
// BRIND and BR_JT are not implemented yet.
// FIXME: Implement both for the scalar perforamnce.
setOperationAction(ISD::BRIND, MVT::Other, Expand);
setOperationAction(ISD::BR_JT, MVT::Other, Expand);
/// } Branch
/// Int Ops {

53
llvm/test/CodeGen/VE/br_jt.ll Normal file
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@ -0,0 +1,53 @@
; RUN: llc < %s -mtriple=ve | FileCheck %s
; Function Attrs: norecurse nounwind readnone
define signext i32 @br_jt(i32 signext %0) {
; CHECK-LABEL: br_jt:
; CHECK: .LBB{{[0-9]+}}_11:
; CHECK-NEXT: adds.w.sx %s0, %s0, (0)1
; CHECK-NEXT: brlt.w 2, %s0, .LBB{{[0-9]+}}_3
; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: breq.w 1, %s0, .LBB{{[0-9]+}}_2
; CHECK-NEXT: # %bb.8:
; CHECK-NEXT: brne.w 2, %s0, .LBB{{[0-9]+}}_9
; CHECK-NEXT: # %bb.6:
; CHECK-NEXT: or %s0, 0, (0)1
; CHECK-NEXT: br.l.t .LBB{{[0-9]+}}_9
; CHECK-NEXT: .LBB{{[0-9]+}}_3:
; CHECK-NEXT: breq.w 3, %s0, .LBB{{[0-9]+}}_7
; CHECK-NEXT: # %bb.4:
; CHECK-NEXT: brne.w 4, %s0, .LBB{{[0-9]+}}_9
; CHECK-NEXT: # %bb.5:
; CHECK-NEXT: or %s0, 7, (0)1
; CHECK-NEXT: br.l.t .LBB{{[0-9]+}}_9
; CHECK-NEXT: .LBB{{[0-9]+}}_2:
; CHECK-NEXT: or %s0, 3, (0)1
; CHECK-NEXT: br.l.t .LBB{{[0-9]+}}_9
; CHECK-NEXT: .LBB{{[0-9]+}}_7:
; CHECK-NEXT: or %s0, 4, (0)1
; CHECK-NEXT: .LBB{{[0-9]+}}_9:
; CHECK-NEXT: adds.w.sx %s0, %s0, (0)1
; CHECK-NEXT: or %s11, 0, %s9
switch i32 %0, label %5 [
i32 1, label %6
i32 2, label %2
i32 3, label %3
i32 4, label %4
]
2: ; preds = %1
br label %6
3: ; preds = %1
br label %6
4: ; preds = %1
br label %6
5: ; preds = %1
br label %6
6: ; preds = %1, %5, %4, %3, %2
%7 = phi i32 [ %0, %5 ], [ 7, %4 ], [ 4, %3 ], [ 0, %2 ], [ 3, %1 ]
ret i32 %7
}

52
llvm/test/CodeGen/VE/brind.ll Normal file
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@ -0,0 +1,52 @@
; RUN: llc < %s -mtriple=ve | FileCheck %s
; Function Attrs: norecurse nounwind readnone
define signext i32 @brind(i32 signext %0) {
; CHECK-LABEL: brind:
; CHECK: .LBB{{[0-9]+}}_6:
; CHECK-NEXT: or %s1, 1, (0)1
; CHECK-NEXT: cmps.w.sx %s1, %s0, %s1
; CHECK-NEXT: lea %s2, .Ltmp0@lo
; CHECK-NEXT: and %s2, %s2, (32)0
; CHECK-NEXT: lea.sl %s2, .Ltmp0@hi(, %s2)
; CHECK-NEXT: lea %s3, .Ltmp1@lo
; CHECK-NEXT: and %s3, %s3, (32)0
; CHECK-NEXT: lea.sl %s3, .Ltmp1@hi(, %s3)
; CHECK-NEXT: cmov.w.eq %s2, %s3, %s1
; CHECK-NEXT: or %s1, 0, (0)1
; CHECK-NEXT: cmps.w.sx %s0, %s0, %s1
; CHECK-NEXT: lea %s1, .Ltmp2@lo
; CHECK-NEXT: and %s1, %s1, (32)0
; CHECK-NEXT: lea.sl %s1, .Ltmp2@hi(, %s1)
; CHECK-NEXT: cmov.w.eq %s1, %s2, %s0
; CHECK-NEXT: b.l.t (, %s1)
; CHECK-NEXT: .Ltmp0: # Block address taken
; CHECK-NEXT: .LBB{{[0-9]+}}_3:
; CHECK-NEXT: or %s0, -1, (0)1
; CHECK-NEXT: br.l.t .LBB{{[0-9]+}}_4
; CHECK-NEXT: .Ltmp2: # Block address taken
; CHECK-NEXT: .LBB{{[0-9]+}}_2:
; CHECK-NEXT: or %s0, 2, (0)1
; CHECK-NEXT: br.l.t .LBB{{[0-9]+}}_4
; CHECK-NEXT: .Ltmp1: # Block address taken
; CHECK-NEXT: .LBB{{[0-9]+}}_1:
; CHECK-NEXT: or %s0, 1, (0)1
; CHECK-NEXT: .LBB{{[0-9]+}}_4: # %.split
; CHECK-NEXT: adds.w.sx %s0, %s0, (0)1
; CHECK-NEXT: or %s11, 0, %s9
%2 = icmp eq i32 %0, 1
%3 = select i1 %2, i8* blockaddress(@brind, %6), i8* blockaddress(@brind, %8)
%4 = icmp eq i32 %0, 0
%5 = select i1 %4, i8* %3, i8* blockaddress(@brind, %7)
indirectbr i8* %5, [label %8, label %6, label %7]
6: ; preds = %1
br label %8
7: ; preds = %1
br label %8
8: ; preds = %1, %7, %6
%9 = phi i32 [ 2, %7 ], [ 1, %6 ], [ -1, %1 ]
ret i32 %9
}