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R600/SI: Add isCFDepth0 Predicate to SALU addc pattern 

llvm-svn: 213529
This commit is contained in:
Tom Stellard 2014-07-21 14:01:12 +00:00
parent 54a3b65bb9
commit b2114caf62
1 changed files with 16 additions and 10 deletions
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26
llvm/lib/Target/R600/SIInstructions.td
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@ -1784,13 +1784,21 @@ def : Pat <
(S_MOV_B32 0), sub1)
>;
} // Predicates = [isSI, isCFDepth0]
let Predicates = [isSI] in {
//===----------------------------------------------------------------------===//
// SOP2 Patterns
//===----------------------------------------------------------------------===//
// V_ADD_I32_e32/S_ADD_I32 produces carry in VCC/SCC. For the vector
// case, the sgpr-copies pass will fix this to use the vector version.
def : Pat <
(i32 (addc i32:$src0, i32:$src1)),
(S_ADD_I32 $src0, $src1)
>;
} // Predicates = [isSI, isCFDepth0]
let Predicates = [isSI] in {
//===----------------------------------------------------------------------===//
// SOPP Patterns
//===----------------------------------------------------------------------===//
@ -1854,6 +1862,11 @@ def : Pat <
(V_MOV_B32_e32 0), sub1)
>;
def : Pat <
(addc i32:$src0, i32:$src1),
(V_ADD_I32_e32 $src0, $src1)
>;
/********** ======================= **********/
/********** Image sampling patterns **********/
/********** ======================= **********/
@ -2848,13 +2861,6 @@ def : Pat <
(V_CMP_EQ_I32_e64 (V_AND_B32_e32 (i32 1), $a), 1)
>;
// V_ADD_I32_e32/S_ADD_I32 produces carry in VCC/SCC. For the vector
// case, the sgpr-copies pass will fix this to use the vector version.
def : Pat <
(i32 (addc i32:$src0, i32:$src1)),
(S_ADD_I32 $src0, $src1)
>;
//============================================================================//
// Miscellaneous Optimization Patterns
//============================================================================//