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Do not model delinearized and linearized access relation for a single access 

A missing return statement that previously did not have a visibly negative
effect caused after some data-structure changes in r248024 multi-dimensional
accesses to be modeled both multi-dimensional as well as linearized. This
commit adds the missing return to avoid the incorrect double modeling as
well as the compile time increases it caused.

llvm-svn: 248171
This commit is contained in:
Tobias Grosser 2015-09-21 16:19:25 +00:00
parent 55dcd40d3e
commit b1c39429d9
3 changed files with 6 additions and 3 deletions
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1
polly/lib/Analysis/ScopInfo.cpp
View File

@ -2906,6 +2906,7 @@ void ScopInfo::buildMemoryAccess(
addMemoryAccess(Inst->getParent(), Inst, Type, BasePointer->getValue(),
AccessFunction, Size, true, Subscripts, SizesSCEV, Val);
return;
}
}
}

6
polly/test/DependenceInfo/do_pluto_matmult.ll
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@ -73,8 +73,8 @@ do.end45: ; preds = %do.cond42
; MEMORY: RAW dependences:
; MEMORY: { Stmt_do_body2[i0, i1, i2] -> Stmt_do_body2[i0, i1, o2] : i0 <= 35 and i0 >= 0 and i1 <= 35 and i1 >= 0 and i2 >= 0 and o2 >= 1 + i2 and o2 <= 35 }
; MEMORY: { Stmt_do_body2[i0, i1, i2] -> Stmt_do_body2[i0, i1, o2] : i0 <= 35 and i0 >= 0 and i1 <= 35 and i1 >= 0 and i2 >= 0 and o2 >= 1 + i2 and o2 <= 35 and o2 >= 0 }
; MEMORY: WAR dependences:
; MEMORY: { Stmt_do_body2[i0, i1, i2] -> Stmt_do_body2[i0, i1, o2] : i0 <= 35 and i0 >= 0 and i1 <= 35 and i1 >= 0 and i2 >= 0 and o2 >= 1 + i2 and o2 <= 35 }
; MEMORY: { Stmt_do_body2[i0, i1, i2] -> Stmt_do_body2[i0, i1, o2] : i0 <= 35 and i0 >= 0 and i1 <= 35 and i1 >= 0 and i2 >= 0 and o2 >= 1 + i2 and o2 <= 35 and o2 >= 0 }
; MEMORY: WAW dependences:
; MEMORY: { Stmt_do_body2[i0, i1, i2] -> Stmt_do_body2[i0, i1, o2] : i0 <= 35 and i0 >= 0 and i1 <= 35 and i1 >= 0 and i2 >= 0 and o2 >= 1 + i2 and o2 <= 35 }
; MEMORY: { Stmt_do_body2[i0, i1, i2] -> Stmt_do_body2[i0, i1, o2] : i0 <= 35 and i0 >= 0 and i1 <= 35 and i1 >= 0 and i2 >= 0 and o2 >= 1 + i2 and o2 <= 35 and o2 >= 0 }

2
polly/test/ScopInfo/loop_affine_bound_0.ll
View File

@ -66,6 +66,8 @@ return: ; preds = %bb.nph8, %bb3, %ent
; CHECK: }
; CHECK: Schedule :=
; CHECK: [N, M] -> { Stmt_bb1[i0, i1] -> [i0, i1] };
; CHECK-NOT: 128i1
; CHECK: MustWriteAccess := [Reduction Type: NONE]
; CHECK: [N, M] -> { Stmt_bb1[i0, i1] -> MemRef_a[i1, i0] };
; CHECK-NOT: 128i1
; CHECK: }