forked from OSchip/llvm-project
[X86][Btver2] Moved JWriteFCmp/JWriteFCmpY classes next to each other. NFCI
Renamed JWriteFPAY22 to JWriteFCmpY - we've tended to avoid latency based names llvm-svn: 328701
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@ -672,6 +672,20 @@ def JWriteFCmpLd: SchedWriteRes<[JLAGU, JFPU0, JFPA]> {
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def : InstRW<[JWriteFCmpLd], (instregex "(V)?M(AX|IN)(P|S)(D|S)rm",
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"(V)?CMPP(S|D)rmi", "(V)?CMPS(S|D)rm")>;
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def JWriteFCmpY: SchedWriteRes<[JFPU0, JFPA]> {
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let Latency = 2;
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let ResourceCycles = [2, 2];
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let NumMicroOps = 2;
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}
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def : InstRW<[JWriteFCmpY], (instregex "VCMPP(S|D)Yrri", "VM(AX|IN)P(D|S)Yrr")>;
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def JWriteFCmpYLd: SchedWriteRes<[JLAGU, JFPU0, JFPA]> {
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let Latency = 7;
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let ResourceCycles = [2, 2, 2];
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let NumMicroOps = 2;
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}
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def : InstRW<[JWriteFCmpYLd, ReadAfterLd], (instregex "VCMPP(S|D)Yrmi", "VM(AX|IN)P(D|S)Yrm")>;
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def JWriteVCVTPDY: SchedWriteRes<[JFPU1, JSTC, JFPX]> {
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let Latency = 6;
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let ResourceCycles = [2, 2, 4];
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@ -752,20 +766,6 @@ def JWriteVBROADCASTYLd: SchedWriteRes<[JLAGU, JFPU01, JFPX]> {
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}
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def : InstRW<[JWriteVBROADCASTYLd, ReadAfterLd], (instrs VBROADCASTSDYrm, VBROADCASTSSYrm)>;
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def JWriteFPAY22: SchedWriteRes<[JFPU0, JFPA]> {
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let Latency = 2;
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let ResourceCycles = [2, 2];
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let NumMicroOps = 2;
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}
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def : InstRW<[JWriteFPAY22], (instregex "VCMPP(S|D)Yrri", "VM(AX|IN)P(D|S)Yrr")>;
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def JWriteFPAY22Ld: SchedWriteRes<[JLAGU, JFPU0, JFPA]> {
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let Latency = 7;
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let ResourceCycles = [2, 2, 2];
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let NumMicroOps = 2;
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}
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def : InstRW<[JWriteFPAY22Ld, ReadAfterLd], (instregex "VCMPP(S|D)Yrmi", "VM(AX|IN)P(D|S)Yrm")>;
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def JWriteVMaskMovLd: SchedWriteRes<[JLAGU, JFPU01, JFPX]> {
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let Latency = 6;
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let ResourceCycles = [1, 1, 2];
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