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Constrain the offset register to a *_NOSP register class when inserting LEA 

instructions.

This unbreaks the machine code verifier and fixes PR8317.

llvm-svn: 115879
This commit is contained in:
Jakob Stoklund Olesen 2010-10-07 00:07:26 +00:00
parent 356f16c142
commit b19bae4e3e
1 changed files with 35 additions and 2 deletions
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37
llvm/lib/Target/X86/X86InstrInfo.cpp
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@ -1099,7 +1099,7 @@ X86InstrInfo::convertToThreeAddressWithLEA(unsigned MIOpc,
unsigned Opc = TM.getSubtarget<X86Subtarget>().is64Bit()
? X86::LEA64_32r : X86::LEA32r;
MachineRegisterInfo &RegInfo = MFI->getParent()->getRegInfo();
unsigned leaInReg = RegInfo.createVirtualRegister(&X86::GR32RegClass);
unsigned leaInReg = RegInfo.createVirtualRegister(&X86::GR32_NOSPRegClass);
unsigned leaOutReg = RegInfo.createVirtualRegister(&X86::GR32RegClass);
// Build and insert into an implicit UNDEF value. This is OK because
@ -1149,7 +1149,7 @@ X86InstrInfo::convertToThreeAddressWithLEA(unsigned MIOpc,
// just a single insert_subreg.
addRegReg(MIB, leaInReg, true, leaInReg, false);
} else {
leaInReg2 = RegInfo.createVirtualRegister(&X86::GR32RegClass);
leaInReg2 = RegInfo.createVirtualRegister(&X86::GR32_NOSPRegClass);
// Build and insert into an implicit UNDEF value. This is OK because
// well be shifting and then extracting the lower 16-bits.
BuildMI(*MFI, MIB, MI->getDebugLoc(), get(X86::IMPLICIT_DEF), leaInReg2);
@ -1236,6 +1236,11 @@ X86InstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
unsigned ShAmt = MI->getOperand(2).getImm();
if (ShAmt == 0 || ShAmt >= 4) return 0;
// LEA can't handle RSP.
if (TargetRegisterInfo::isVirtualRegister(Src) &&
!MF.getRegInfo().constrainRegClass(Src, &X86::GR64_NOSPRegClass))
return 0;
NewMI = BuildMI(MF, MI->getDebugLoc(), get(X86::LEA64r))
.addReg(Dest, RegState::Define | getDeadRegState(isDead))
.addReg(0).addImm(1 << ShAmt)
@ -1250,6 +1255,11 @@ X86InstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
unsigned ShAmt = MI->getOperand(2).getImm();
if (ShAmt == 0 || ShAmt >= 4) return 0;
// LEA can't handle ESP.
if (TargetRegisterInfo::isVirtualRegister(Src) &&
!MF.getRegInfo().constrainRegClass(Src, &X86::GR32_NOSPRegClass))
return 0;
unsigned Opc = is64Bit ? X86::LEA64_32r : X86::LEA32r;
NewMI = BuildMI(MF, MI->getDebugLoc(), get(Opc))
.addReg(Dest, RegState::Define | getDeadRegState(isDead))
@ -1288,6 +1298,14 @@ X86InstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
assert(MI->getNumOperands() >= 2 && "Unknown inc instruction!");
unsigned Opc = MIOpc == X86::INC64r ? X86::LEA64r
: (is64Bit ? X86::LEA64_32r : X86::LEA32r);
// LEA can't handle RSP.
if (TargetRegisterInfo::isVirtualRegister(Src) &&
!MF.getRegInfo().constrainRegClass(Src,
MIOpc == X86::INC64r ? X86::GR64_NOSPRegisterClass :
X86::GR32_NOSPRegisterClass))
return 0;
NewMI = addRegOffset(BuildMI(MF, MI->getDebugLoc(), get(Opc))
.addReg(Dest, RegState::Define |
getDeadRegState(isDead)),
@ -1310,6 +1328,13 @@ X86InstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
assert(MI->getNumOperands() >= 2 && "Unknown dec instruction!");
unsigned Opc = MIOpc == X86::DEC64r ? X86::LEA64r
: (is64Bit ? X86::LEA64_32r : X86::LEA32r);
// LEA can't handle RSP.
if (TargetRegisterInfo::isVirtualRegister(Src) &&
!MF.getRegInfo().constrainRegClass(Src,
MIOpc == X86::DEC64r ? X86::GR64_NOSPRegisterClass :
X86::GR32_NOSPRegisterClass))
return 0;
NewMI = addRegOffset(BuildMI(MF, MI->getDebugLoc(), get(Opc))
.addReg(Dest, RegState::Define |
getDeadRegState(isDead)),
@ -1333,6 +1358,14 @@ X86InstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
: (is64Bit ? X86::LEA64_32r : X86::LEA32r);
unsigned Src2 = MI->getOperand(2).getReg();
bool isKill2 = MI->getOperand(2).isKill();
// LEA can't handle RSP.
if (TargetRegisterInfo::isVirtualRegister(Src2) &&
!MF.getRegInfo().constrainRegClass(Src2,
MIOpc == X86::ADD64rr ? X86::GR64_NOSPRegisterClass :
X86::GR32_NOSPRegisterClass))
return 0;
NewMI = addRegReg(BuildMI(MF, MI->getDebugLoc(), get(Opc))
.addReg(Dest, RegState::Define |
getDeadRegState(isDead)),