forked from OSchip/llvm-project
ARM64: add a few bits of polynomial intrinsic codegen.
llvm-svn: 205303
This commit is contained in:
parent
4f1dd58e2e
commit
b17f9a4609
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@ -2608,6 +2608,7 @@ static NeonIntrinsicInfo ARM64SISDIntrinsicMap[] = {
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NEONMAP1(vminvq_f64, arm64_neon_fminv, AddRetType | Add1ArgType),
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NEONMAP1(vminvq_s32, arm64_neon_sminv, AddRetType | Add1ArgType),
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NEONMAP1(vminvq_u32, arm64_neon_uminv, AddRetType | Add1ArgType),
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NEONMAP1(vmull_p64, arm64_neon_pmull64, 0),
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NEONMAP1(vmulxd_f64, arm64_neon_fmulx, Add1ArgType),
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NEONMAP1(vmulxs_f32, arm64_neon_fmulx, Add1ArgType),
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NEONMAP1(vpaddd_s64, arm64_neon_uaddv, AddRetType | Add1ArgType),
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@ -5190,6 +5191,16 @@ Value *CodeGenFunction::EmitARM64BuiltinExpr(unsigned BuiltinID,
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// Handle non-overloaded intrinsics first.
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switch (BuiltinID) {
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default: break;
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case NEON::BI__builtin_neon_vldrq_p128: {
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llvm::Type *Int128PTy = llvm::Type::getIntNPtrTy(getLLVMContext(), 128);
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Value *Ptr = Builder.CreateBitCast(EmitScalarExpr(E->getArg(0)), Int128PTy);
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return Builder.CreateLoad(Ptr);
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}
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case NEON::BI__builtin_neon_vstrq_p128: {
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llvm::Type *Int128PTy = llvm::Type::getIntNPtrTy(getLLVMContext(), 128);
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Value *Ptr = Builder.CreateBitCast(Ops[0], Int128PTy);
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return Builder.CreateStore(EmitScalarExpr(E->getArg(1)), Ptr);
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}
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case NEON::BI__builtin_neon_vcvts_u32_f32:
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case NEON::BI__builtin_neon_vcvtd_u64_f64:
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usgn = true;
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@ -1,6 +1,11 @@
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// REQUIRES: aarch64-registered-target
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// REQUIRES: arm64-registered-target
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// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +neon \
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// RUN: -ffp-contract=fast -S -O3 -o - %s | FileCheck %s
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// RUN: -ffp-contract=fast -S -O3 -o - %s | FileCheck %s --check-prefix=CHECK \
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// RUN: --check-prefix=CHECK-AARCH64
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// RUN: %clang_cc1 -triple arm64-none-linux-gnu \
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// RUN: -ffp-contract=fast -S -O3 -o - %s | FileCheck %s --check-prefix=CHECK \
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// RUN: --check-prefix=CHECK-ARM64
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// Test new aarch64 intrinsics with poly128
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// FIXME: Currently, poly128_t equals to uint128, which will be spilt into
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@ -14,22 +19,29 @@
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void test_vstrq_p128(poly128_t * ptr, poly128_t val) {
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// CHECK-LABEL: test_vstrq_p128
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vstrq_p128(ptr, val);
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// CHECK: str {{x[0-9]+}}, [{{x[0-9]+}}, #8]
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// CHECK-NEXT: str {{x[0-9]+}}, [{{x[0-9]+}}]
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// CHECK-AARCH64: str {{x[0-9]+}}, [{{x[0-9]+}}, #8]
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// CHECK-AARCH64-NEXT: str {{x[0-9]+}}, [{{x[0-9]+}}]
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// CHECK-ARM64: stp {{x[0-9]+}}, {{x[0-9]+}}, [x0]
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}
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poly128_t test_vldrq_p128(poly128_t * ptr) {
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// CHECK-LABEL: test_vldrq_p128
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return vldrq_p128(ptr);
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// CHECK: ldr {{x[0-9]+}}, [{{x[0-9]+}}]
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// CHECK-NEXT: ldr {{x[0-9]+}}, [{{x[0-9]+}}, #8]
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// CHECK-AARCH64: ldr {{x[0-9]+}}, [{{x[0-9]+}}]
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// CHECK-AARCH64-NEXT: ldr {{x[0-9]+}}, [{{x[0-9]+}}, #8]
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// CHECK-ARM64: ldp {{x[0-9]+}}, {{x[0-9]+}}, [x0]
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}
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void test_ld_st_p128(poly128_t * ptr) {
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// CHECK-LABEL: test_ld_st_p128
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vstrq_p128(ptr+1, vldrq_p128(ptr));
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// CHECK: ldr {{q[0-9]+}}, [{{x[0-9]+}}]
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// CHECK-NEXT: str {{q[0-9]+}}, [{{x[0-9]+}}, #16]
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// CHECK-AARCH64: ldr {{q[0-9]+}}, [{{x[0-9]+}}]
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// CHECK-AARCH64-NEXT: str {{q[0-9]+}}, [{{x[0-9]+}}, #16]
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// CHECK-ARM64: ldp [[PLO:x[0-9]+]], [[PHI:x[0-9]+]], [{{x[0-9]+}}]
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// CHECK-ARM64-NEXT: stp [[PLO]], [[PHI]], [{{x[0-9]+}}, #16]
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}
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poly128_t test_vmull_p64(poly64_t a, poly64_t b) {
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@ -1,6 +1,11 @@
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// REQUIRES: aarch64-registered-target
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// REQUIRES: arm64-registered-target
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// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +neon \
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// RUN: -ffp-contract=fast -S -O3 -o - %s | FileCheck %s
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// RUN: -ffp-contract=fast -S -O3 -o - %s | FileCheck %s --check-prefix=CHECK \
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// RUN: --check-prefix=CHECK-AARCH64
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// RUN: %clang_cc1 -triple arm64-none-linux-gnu \
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// RUN: -ffp-contract=fast -S -O3 -o - %s | FileCheck %s --check-prefix=CHECK \
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// RUN: --check-prefix=CHECK-ARM64
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// Test new aarch64 intrinsics with poly64
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@ -69,7 +74,9 @@ poly64x2_t test_vsetq_lane_p64(poly64_t a, poly64x2_t v) {
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poly64x1_t test_vcopy_lane_p64(poly64x1_t a, poly64x1_t b) {
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// CHECK-LABEL: test_vcopy_lane_p64
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return vcopy_lane_p64(a, 0, b, 0);
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// CHECK: fmov {{d[0-9]+}}, {{d[0-9]+}}
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// CHECK-AARCH64: fmov {{d[0-9]+}}, {{d[0-9]+}}
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// CHECK-ARM64: orr v0.16b, v1.16b, v1.16b
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}
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poly64x2_t test_vcopyq_lane_p64(poly64x2_t a, poly64x1_t b) {
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@ -81,7 +88,7 @@ poly64x2_t test_vcopyq_lane_p64(poly64x2_t a, poly64x1_t b) {
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poly64x2_t test_vcopyq_laneq_p64(poly64x2_t a, poly64x2_t b) {
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// CHECK-LABEL: test_vcopyq_laneq_p64
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return vcopyq_laneq_p64(a, 1, b, 1);
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// CHECK: ins {{v[0-9]+}}.d[1], {{v[0-9]+}}.d[1]
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// CHECK-AARCH64: ins {{v[0-9]+}}.d[1], {{v[0-9]+}}.d[1]
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}
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poly64x1_t test_vcreate_p64(uint64_t a) {
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@ -128,97 +135,101 @@ poly64x2_t test_vcombine_p64(poly64x1_t low, poly64x1_t high) {
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poly64x1_t test_vld1_p64(poly64_t const * ptr) {
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// CHECK-LABEL: test_vld1_p64
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return vld1_p64(ptr);
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// CHECK: ld1 {{{v[0-9]+}}.1d}, [{{x[0-9]+|sp}}]
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// CHECK-AARCH64: ld1 {{{v[0-9]+}}.1d}, [{{x[0-9]+|sp}}]
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// CHECK-ARM64: ldr {{d[0-9]+}}, [{{x[0-9]+|sp}}]
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}
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poly64x2_t test_vld1q_p64(poly64_t const * ptr) {
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// CHECK-LABEL: test_vld1q_p64
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return vld1q_p64(ptr);
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// CHECK: ld1 {{{v[0-9]+}}.2d}, [{{x[0-9]+|sp}}]
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// CHECK-AARCH64: ld1 {{{v[0-9]+}}.2d}, [{{x[0-9]+|sp}}]
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// CHECK-ARM64: ldr {{q[0-9]+}}, [{{x[0-9]+|sp}}]
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}
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void test_vst1_p64(poly64_t * ptr, poly64x1_t val) {
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// CHECK-LABEL: test_vst1_p64
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return vst1_p64(ptr, val);
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// CHECK: st1 {{{v[0-9]+}}.1d}, [{{x[0-9]+|sp}}]
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// CHECK-AARCH64: st1 {{{v[0-9]+}}.1d}, [{{x[0-9]+|sp}}]
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// CHECK-ARM64: str {{d[0-9]+}}, [{{x[0-9]+|sp}}]
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}
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void test_vst1q_p64(poly64_t * ptr, poly64x2_t val) {
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// CHECK-LABEL: test_vst1q_p64
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return vst1q_p64(ptr, val);
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// CHECK: st1 {{{v[0-9]+}}.2d}, [{{x[0-9]+|sp}}]
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// CHECK-AARCH64: st1 {{{v[0-9]+}}.2d}, [{{x[0-9]+|sp}}]
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// CHECK-ARM64: str {{q[0-9]+}}, [{{x[0-9]+|sp}}]
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}
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poly64x1x2_t test_vld2_p64(poly64_t const * ptr) {
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// CHECK-LABEL: test_vld2_p64
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return vld2_p64(ptr);
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// CHECK: ld1 {{{v[0-9]+}}.1d, {{v[0-9]+}}.1d}, [{{x[0-9]+|sp}}]
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// CHECK: ld1 {{{ *v[0-9]+.1d, v[0-9]+.1d *}}}, [{{x[0-9]+|sp}}]
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}
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poly64x2x2_t test_vld2q_p64(poly64_t const * ptr) {
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// CHECK-LABEL: test_vld2q_p64
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return vld2q_p64(ptr);
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// CHECK: ld2 {{{v[0-9]+}}.2d, {{v[0-9]+}}.2d}, [{{x[0-9]+|sp}}]
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// CHECK: ld2 {{{ *v[0-9]+.2d, v[0-9]+.2d *}}}, [{{x[0-9]+|sp}}]
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}
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poly64x1x3_t test_vld3_p64(poly64_t const * ptr) {
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// CHECK-LABEL: test_vld3_p64
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return vld3_p64(ptr);
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// CHECK: ld1 {{{v[0-9]+}}.1d, {{v[0-9]+}}.1d, {{v[0-9]+}}.1d}, [{{x[0-9]+|sp}}]
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// CHECK: ld1 {{{ *v[0-9]+.1d, v[0-9]+.1d, v[0-9]+.1d *}}}, [{{x[0-9]+|sp}}]
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}
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poly64x2x3_t test_vld3q_p64(poly64_t const * ptr) {
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// CHECK-LABEL: test_vld3q_p64
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return vld3q_p64(ptr);
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// CHECK: ld3 {{{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d}, [{{x[0-9]+|sp}}]
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// CHECK: ld3 {{{ *v[0-9]+.2d, v[0-9]+.2d, v[0-9]+.2d *}}}, [{{x[0-9]+|sp}}]
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}
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poly64x1x4_t test_vld4_p64(poly64_t const * ptr) {
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// CHECK-LABEL: test_vld4_p64
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return vld4_p64(ptr);
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// CHECK: ld1 {{{v[0-9]+}}.1d, {{v[0-9]+}}.1d, {{v[0-9]+}}.1d, {{v[0-9]+}}.1d}, [{{x[0-9]+|sp}}]
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// CHECK: ld1 {{{ *v[0-9]+.1d, v[0-9]+.1d, v[0-9]+.1d, v[0-9]+.1d *}}}, [{{x[0-9]+|sp}}]
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}
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poly64x2x4_t test_vld4q_p64(poly64_t const * ptr) {
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// CHECK-LABEL: test_vld4q_p64
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return vld4q_p64(ptr);
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// CHECK: ld4 {{{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d}, [{{x[0-9]+|sp}}]
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// CHECK: ld4 {{{ *v[0-9]+.2d, v[0-9]+.2d, v[0-9]+.2d, v[0-9]+.2d *}}}, [{{x[0-9]+|sp}}]
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}
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void test_vst2_p64(poly64_t * ptr, poly64x1x2_t val) {
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// CHECK-LABEL: test_vst2_p64
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return vst2_p64(ptr, val);
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// CHECK: st1 {{{v[0-9]+}}.1d, {{v[0-9]+}}.1d}, [{{x[0-9]+|sp}}]
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// CHECK: st1 {{{ *v[0-9]+.1d, v[0-9]+.1d *}}}, [{{x[0-9]+|sp}}]
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}
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void test_vst2q_p64(poly64_t * ptr, poly64x2x2_t val) {
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// CHECK-LABEL: test_vst2q_p64
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return vst2q_p64(ptr, val);
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// CHECK: st2 {{{v[0-9]+}}.2d, {{v[0-9]+}}.2d}, [{{x[0-9]+|sp}}]
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// CHECK: st2 {{{ *v[0-9]+.2d, v[0-9]+.2d *}}}, [{{x[0-9]+|sp}}]
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}
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void test_vst3_p64(poly64_t * ptr, poly64x1x3_t val) {
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// CHECK-LABEL: test_vst3_p64
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return vst3_p64(ptr, val);
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// CHECK: st1 {{{v[0-9]+}}.1d, {{v[0-9]+}}.1d, {{v[0-9]+}}.1d}, [{{x[0-9]+|sp}}]
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// CHECK: st1 {{{ *v[0-9]+.1d, v[0-9]+.1d, v[0-9]+.1d *}}}, [{{x[0-9]+|sp}}]
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}
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void test_vst3q_p64(poly64_t * ptr, poly64x2x3_t val) {
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// CHECK-LABEL: test_vst3q_p64
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return vst3q_p64(ptr, val);
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// CHECK: st3 {{{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d}, [{{x[0-9]+|sp}}]
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// CHECK: st3 {{{ *v[0-9]+.2d, v[0-9]+.2d, v[0-9]+.2d *}}}, [{{x[0-9]+|sp}}]
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}
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void test_vst4_p64(poly64_t * ptr, poly64x1x4_t val) {
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// CHECK-LABEL: test_vst4_p64
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return vst4_p64(ptr, val);
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// CHECK: st1 {{{v[0-9]+}}.1d, {{v[0-9]+}}.1d, {{v[0-9]+}}.1d, {{v[0-9]+}}.1d}, [{{x[0-9]+|sp}}]
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// CHECK: st1 {{{ *v[0-9]+.1d, v[0-9]+.1d, v[0-9]+.1d, v[0-9]+.1d *}}}, [{{x[0-9]+|sp}}]
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}
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void test_vst4q_p64(poly64_t * ptr, poly64x2x4_t val) {
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// CHECK-LABEL: test_vst4q_p64
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return vst4q_p64(ptr, val);
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// CHECK: st4 {{{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d}, [{{x[0-9]+|sp}}]
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// CHECK: st4 {{{ *v[0-9]+.2d, v[0-9]+.2d, v[0-9]+.2d, v[0-9]+.2d *}}}, [{{x[0-9]+|sp}}]
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}
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poly64x1_t test_vext_p64(poly64x1_t a, poly64x1_t b) {
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poly64x2_t test_vextq_p64(poly64x2_t a, poly64x2_t b) {
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// CHECK-LABEL: test_vextq_p64
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return vextq_p64(a, b, 1);
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// CHECK: ext {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, #0x8
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// CHECK: ext {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{#0x8|#8}}
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}
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poly64x2_t test_vzip1q_p64(poly64x2_t a, poly64x2_t b) {
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// CHECK-LABEL: test_vzip1q_p64
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return vzip1q_p64(a, b);
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// CHECK: ins {{v[0-9]+}}.d[1], {{v[0-9]+}}.d[0]
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// CHECK-AARCH64: ins {{v[0-9]+}}.d[1], {{v[0-9]+}}.d[0]
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// CHECK-ARM64: zip1 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
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}
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poly64x2_t test_vzip2q_p64(poly64x2_t a, poly64x2_t b) {
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// CHECK-LABEL: test_vzip2q_p64
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return vzip2q_u64(a, b);
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// CHECK: ins {{v[0-9]+}}.d[0], {{v[0-9]+}}.d[1]
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// CHECK-AARCH64: ins {{v[0-9]+}}.d[0], {{v[0-9]+}}.d[1]
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// CHECK-ARM64: zip2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
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}
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poly64x2_t test_vuzp1q_p64(poly64x2_t a, poly64x2_t b) {
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// CHECK-LABEL: test_vuzp1q_p64
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return vuzp1q_p64(a, b);
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// CHECK: ins {{v[0-9]+}}.d[1], {{v[0-9]+}}.d[0]
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// CHECK-AARCH64: ins {{v[0-9]+}}.d[1], {{v[0-9]+}}.d[0]
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// CHECK-ARM64: zip1 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
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}
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poly64x2_t test_vuzp2q_p64(poly64x2_t a, poly64x2_t b) {
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// CHECK-LABEL: test_vuzp2q_p64
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return vuzp2q_u64(a, b);
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// CHECK: ins {{v[0-9]+}}.d[0], {{v[0-9]+}}.d[1]
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// CHECK-AARCH64: ins {{v[0-9]+}}.d[0], {{v[0-9]+}}.d[1]
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// CHECK-ARM64: zip2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
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}
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poly64x2_t test_vtrn1q_p64(poly64x2_t a, poly64x2_t b) {
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// CHECK-LABEL: test_vtrn1q_p64
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return vtrn1q_p64(a, b);
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// CHECK: ins {{v[0-9]+}}.d[1], {{v[0-9]+}}.d[0]
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// CHECK-AARCH64: ins {{v[0-9]+}}.d[1], {{v[0-9]+}}.d[0]
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// CHECK-ARM64: zip1 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
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}
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poly64x2_t test_vtrn2q_p64(poly64x2_t a, poly64x2_t b) {
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// CHECK-LABEL: test_vtrn2q_p64
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return vtrn2q_u64(a, b);
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// CHECK: ins {{v[0-9]+}}.d[0], {{v[0-9]+}}.d[1]
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// CHECK-AARCH64: ins {{v[0-9]+}}.d[0], {{v[0-9]+}}.d[1]
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// CHECK-ARM64: zip2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
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}
|
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|
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poly64x1_t test_vsri_n_p64(poly64x1_t a, poly64x1_t b) {
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Loading…
Reference in New Issue