forked from OSchip/llvm-project
Protect PPC Altivec patterns with a predicate
In preparation for the addition of other SIMD ISA extensions (such as QPX) we need to make sure that all Altivec patterns are properly predicated on having Altivec support. No functionality change intended (one test case needed to be updated b/c it assumed that Altivec intrinsics would be supported without enabling Altivec support). llvm-svn: 177152
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@ -182,6 +182,9 @@ class VX2_Int<bits<11> xo, string opc, Intrinsic IntID>
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//===----------------------------------------------------------------------===//
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// Instruction Definitions.
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def HasAltivec : Predicate<"PPCSubTarget.hasAltivec()">;
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let Predicates = [HasAltivec] in {
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def DSS : DSS_Form<822, (outs),
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(ins u5imm:$ZERO0, u5imm:$STRM,u5imm:$ZERO1,u5imm:$ZERO2),
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"dss $STRM", LdStLoad /*FIXME*/, []>;
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@ -733,3 +736,6 @@ def : Pat<(v4f32 (ftrunc (v4f32 VRRC:$vA))),
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(VRFIZ VRRC:$vA)>;
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def : Pat<(v4f32 (fnearbyint (v4f32 VRRC:$vA))),
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(VRFIN VRRC:$vA)>;
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} // end HasAltivec
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@ -1,4 +1,4 @@
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; RUN: llc < %s -march=ppc64 | grep dst | count 4
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; RUN: llc < %s -march=ppc64 -mattr=+altivec | grep dst | count 4
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define hidden void @_Z4borkPc(i8* %image) {
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entry:
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