forked from OSchip/llvm-project
[X86] Add AVX2 'fast-variable-shuffle' PHADD tests (PR39921)
Haswell etc. will combine shuffles to a extract_subvector(permd(x)) before isHorizontalBinOp can match it. llvm-svn: 362326
This commit is contained in:
Simon Pilgrim
parent
2065ddfd79
commit
b0dc262ffb
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@ -5,6 +5,7 @@
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx,fast-hops | FileCheck %s --check-prefixes=AVX,AVX-FAST,AVX1,AVX1-FAST
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX-SLOW,AVX2,AVX2-SLOW
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2,fast-hops | FileCheck %s --check-prefixes=AVX,AVX-FAST,AVX2,AVX2-FAST
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2,fast-variable-shuffle | FileCheck %s --check-prefixes=AVX,AVX2,AVX2-SHUF
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define <8 x i16> @phaddw1(<8 x i16> %x, <8 x i16> %y) {
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; SSSE3-LABEL: phaddw1:
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@ -140,6 +141,12 @@ define <4 x i32> @phaddd6(<4 x i32> %x) {
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; AVX-FAST: # %bb.0:
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; AVX-FAST-NEXT: vphaddd %xmm0, %xmm0, %xmm0
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; AVX-FAST-NEXT: retq
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;
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; AVX2-SHUF-LABEL: phaddd6:
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; AVX2-SHUF: # %bb.0:
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; AVX2-SHUF-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
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; AVX2-SHUF-NEXT: vpaddd %xmm1, %xmm0, %xmm0
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; AVX2-SHUF-NEXT: retq
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%a = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
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%b = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
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%r = add <4 x i32> %a, %b
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@ -248,6 +255,12 @@ define <4 x i32> @phsubd4(<4 x i32> %x) {
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; AVX-FAST: # %bb.0:
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; AVX-FAST-NEXT: vphsubd %xmm0, %xmm0, %xmm0
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; AVX-FAST-NEXT: retq
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;
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; AVX2-SHUF-LABEL: phsubd4:
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; AVX2-SHUF: # %bb.0:
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; AVX2-SHUF-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
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; AVX2-SHUF-NEXT: vpsubd %xmm1, %xmm0, %xmm0
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; AVX2-SHUF-NEXT: retq
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%a = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
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%b = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
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%r = sub <4 x i32> %a, %b
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@ -384,6 +397,12 @@ define <4 x i32> @phaddd_single_source4(<4 x i32> %x) {
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; AVX-FAST: # %bb.0:
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; AVX-FAST-NEXT: vphaddd %xmm0, %xmm0, %xmm0
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; AVX-FAST-NEXT: retq
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;
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; AVX2-SHUF-LABEL: phaddd_single_source4:
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; AVX2-SHUF: # %bb.0:
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; AVX2-SHUF-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[0,1,2,2]
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; AVX2-SHUF-NEXT: vpaddd %xmm0, %xmm1, %xmm0
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; AVX2-SHUF-NEXT: retq
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%l = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> <i32 undef, i32 undef, i32 undef, i32 2>
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%add = add <4 x i32> %l, %x
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ret <4 x i32> %add
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@ -415,6 +434,13 @@ define <4 x i32> @phaddd_single_source5(<4 x i32> %x) {
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; AVX-FAST-NEXT: vphaddd %xmm0, %xmm0, %xmm0
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; AVX-FAST-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[3,1,2,3]
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; AVX-FAST-NEXT: retq
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;
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; AVX2-SHUF-LABEL: phaddd_single_source5:
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; AVX2-SHUF: # %bb.0:
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; AVX2-SHUF-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[0,1,2,2]
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; AVX2-SHUF-NEXT: vpaddd %xmm0, %xmm1, %xmm0
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; AVX2-SHUF-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[3,1,2,3]
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; AVX2-SHUF-NEXT: retq
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%l = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> <i32 undef, i32 undef, i32 undef, i32 2>
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%add = add <4 x i32> %l, %x
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%shuffle2 = shufflevector <4 x i32> %add, <4 x i32> undef, <4 x i32> <i32 3, i32 undef, i32 undef, i32 undef>
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@ -464,12 +490,25 @@ define <8 x i16> @phaddw_single_source2(<8 x i16> %x) {
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; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,1,2,3]
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; SSSE3-NEXT: retq
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;
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; AVX-LABEL: phaddw_single_source2:
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; AVX: # %bb.0:
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; AVX-NEXT: vphaddw %xmm0, %xmm0, %xmm0
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; AVX-NEXT: vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,5,4,6,7]
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; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,1,2,3]
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; AVX-NEXT: retq
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; AVX-SLOW-LABEL: phaddw_single_source2:
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; AVX-SLOW: # %bb.0:
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; AVX-SLOW-NEXT: vphaddw %xmm0, %xmm0, %xmm0
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; AVX-SLOW-NEXT: vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,5,4,6,7]
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; AVX-SLOW-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,1,2,3]
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; AVX-SLOW-NEXT: retq
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;
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; AVX-FAST-LABEL: phaddw_single_source2:
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; AVX-FAST: # %bb.0:
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; AVX-FAST-NEXT: vphaddw %xmm0, %xmm0, %xmm0
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; AVX-FAST-NEXT: vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,5,4,6,7]
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; AVX-FAST-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,1,2,3]
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; AVX-FAST-NEXT: retq
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;
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; AVX2-SHUF-LABEL: phaddw_single_source2:
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; AVX2-SHUF: # %bb.0:
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; AVX2-SHUF-NEXT: vphaddw %xmm0, %xmm0, %xmm0
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; AVX2-SHUF-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[10,11,8,9,4,5,6,7,10,11,8,9,12,13,14,15]
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; AVX2-SHUF-NEXT: retq
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%l = shufflevector <8 x i16> %x, <8 x i16> undef, <8 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 0, i32 2, i32 4, i32 6>
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%r = shufflevector <8 x i16> %x, <8 x i16> undef, <8 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 1, i32 3, i32 5, i32 7>
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%add = add <8 x i16> %l, %r
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@ -517,6 +556,12 @@ define <8 x i16> @phaddw_single_source4(<8 x i16> %x) {
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; AVX-FAST: # %bb.0:
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; AVX-FAST-NEXT: vphaddw %xmm0, %xmm0, %xmm0
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; AVX-FAST-NEXT: retq
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;
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; AVX2-SHUF-LABEL: phaddw_single_source4:
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; AVX2-SHUF: # %bb.0:
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; AVX2-SHUF-NEXT: vpslld $16, %xmm0, %xmm1
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; AVX2-SHUF-NEXT: vpaddw %xmm0, %xmm1, %xmm0
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; AVX2-SHUF-NEXT: retq
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%l = shufflevector <8 x i16> %x, <8 x i16> undef, <8 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 6>
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%add = add <8 x i16> %l, %x
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ret <8 x i16> %add
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@ -601,6 +646,20 @@ define i32 @PR39936_v8i32(<8 x i32>) {
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; AVX2-FAST-NEXT: vmovd %xmm0, %eax
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; AVX2-FAST-NEXT: vzeroupper
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; AVX2-FAST-NEXT: retq
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;
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; AVX2-SHUF-LABEL: PR39936_v8i32:
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; AVX2-SHUF: # %bb.0:
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; AVX2-SHUF-NEXT: vmovdqa {{.*#+}} ymm1 = [0,2,4,6,4,6,6,7]
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; AVX2-SHUF-NEXT: vpermd %ymm0, %ymm1, %ymm1
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; AVX2-SHUF-NEXT: vmovdqa {{.*#+}} ymm2 = [1,3,5,7,5,7,6,7]
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; AVX2-SHUF-NEXT: vpermd %ymm0, %ymm2, %ymm0
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; AVX2-SHUF-NEXT: vpaddd %xmm0, %xmm1, %xmm0
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; AVX2-SHUF-NEXT: vphaddd %xmm0, %xmm0, %xmm0
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; AVX2-SHUF-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
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; AVX2-SHUF-NEXT: vpaddd %xmm0, %xmm1, %xmm0
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; AVX2-SHUF-NEXT: vmovd %xmm0, %eax
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; AVX2-SHUF-NEXT: vzeroupper
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; AVX2-SHUF-NEXT: retq
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%2 = shufflevector <8 x i32> %0, <8 x i32> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 undef, i32 undef, i32 undef, i32 undef>
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%3 = shufflevector <8 x i32> %0, <8 x i32> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 undef, i32 undef, i32 undef, i32 undef>
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%4 = add <8 x i32> %2, %3
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