forked from OSchip/llvm-project
Remove addFrameMove.
Now that we have good testing, remove addFrameMove and create cfi instructions directly. llvm-svn: 182052
This commit is contained in:
parent
da5d100005
commit
b08d2c2db0
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@ -238,8 +238,9 @@ public:
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return FrameInstructions;
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}
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void addFrameMove(MCSymbol *Label, const MachineLocation &Dst,
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const MachineLocation &Src);
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void addFrameInst(const MCCFIInstruction &Inst) {
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FrameInstructions.push_back(Inst);
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}
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/// getCompactUnwindEncoding - Returns the compact unwind encoding for a
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/// function if the target supports the encoding. This encoding replaces a
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@ -268,39 +268,6 @@ MachineModuleInfo::MachineModuleInfo()
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MachineModuleInfo::~MachineModuleInfo() {
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}
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static MCCFIInstruction convertMoveToCFI(const MCRegisterInfo &MRI,
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MCSymbol *Label,
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const MachineLocation &Dst,
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const MachineLocation &Src) {
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// If advancing cfa.
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if (Dst.isReg() && Dst.getReg() == MachineLocation::VirtualFP) {
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if (Src.getReg() == MachineLocation::VirtualFP)
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return MCCFIInstruction::createDefCfaOffset(Label, Src.getOffset());
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// Reg + Offset
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return MCCFIInstruction::createDefCfa(
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Label, MRI.getDwarfRegNum(Src.getReg(), true), -Src.getOffset());
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}
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if (Src.isReg() && Src.getReg() == MachineLocation::VirtualFP) {
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assert(Dst.isReg() && "Machine move not supported yet.");
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return MCCFIInstruction::createDefCfaRegister(
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Label, MRI.getDwarfRegNum(Dst.getReg(), true));
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}
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assert(!Dst.isReg() && "Machine move not supported yet.");
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return MCCFIInstruction::createOffset(
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Label, MRI.getDwarfRegNum(Src.getReg(), true), Dst.getOffset());
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}
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void MachineModuleInfo::addFrameMove(MCSymbol *Label,
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const MachineLocation &Dst,
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const MachineLocation &Src) {
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MCCFIInstruction I =
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convertMoveToCFI(Context.getRegisterInfo(), Label, Dst, Src);
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FrameInstructions.push_back(I);
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}
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bool MachineModuleInfo::doInitialization(Module &M) {
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ObjFileMMI = 0;
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@ -54,6 +54,7 @@ void AArch64FrameLowering::emitPrologue(MachineFunction &MF) const {
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DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
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MachineModuleInfo &MMI = MF.getMMI();
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const MCRegisterInfo &MRI = MMI.getContext().getRegisterInfo();
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bool NeedsFrameMoves = MMI.hasDebugInfo()
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|| MF.getFunction()->needsUnwindTableEntry();
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@ -96,8 +97,9 @@ void AArch64FrameLowering::emitPrologue(MachineFunction &MF) const {
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.addSym(SPLabel);
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MachineLocation Dst(MachineLocation::VirtualFP);
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MachineLocation Src(AArch64::XSP, NumInitialBytes);
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MMI.addFrameMove(SPLabel, Dst, Src);
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unsigned Reg = MRI.getDwarfRegNum(AArch64::XSP, true);
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MMI.addFrameInst(
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MCCFIInstruction::createDefCfa(SPLabel, Reg, -NumInitialBytes));
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}
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// Otherwise we need to set the frame pointer and/or add a second stack
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@ -130,9 +132,9 @@ void AArch64FrameLowering::emitPrologue(MachineFunction &MF) const {
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MCSymbol *FPLabel = MMI.getContext().CreateTempSymbol();
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BuildMI(MBB, MBBI, DL, TII.get(TargetOpcode::PROLOG_LABEL))
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.addSym(FPLabel);
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MachineLocation Dst(MachineLocation::VirtualFP);
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MachineLocation Src(AArch64::X29, -MFI->getObjectOffset(X29FrameIdx));
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MMI.addFrameMove(FPLabel, Dst, Src);
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unsigned Reg = MRI.getDwarfRegNum(AArch64::X29, true);
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unsigned Offset = MFI->getObjectOffset(X29FrameIdx);
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MMI.addFrameInst(MCCFIInstruction::createDefCfa(FPLabel, Reg, Offset));
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}
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FPNeedsSetting = false;
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@ -163,8 +165,9 @@ void AArch64FrameLowering::emitPrologue(MachineFunction &MF) const {
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.addSym(CSLabel);
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MachineLocation Dst(MachineLocation::VirtualFP);
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MachineLocation Src(AArch64::XSP, NumResidualBytes + NumInitialBytes);
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MMI.addFrameMove(CSLabel, Dst, Src);
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unsigned Reg = MRI.getDwarfRegNum(AArch64::XSP, true);
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unsigned Offset = NumResidualBytes + NumInitialBytes;
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MMI.addFrameInst(MCCFIInstruction::createDefCfa(CSLabel, Reg, -Offset));
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}
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// And any callee-saved registers (it's fine to leave them to the end here,
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@ -179,10 +182,9 @@ void AArch64FrameLowering::emitPrologue(MachineFunction &MF) const {
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for (std::vector<CalleeSavedInfo>::const_iterator I = CSI.begin(),
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E = CSI.end(); I != E; ++I) {
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MachineLocation Dst(MachineLocation::VirtualFP,
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MFI->getObjectOffset(I->getFrameIdx()));
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MachineLocation Src(I->getReg());
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MMI.addFrameMove(CSLabel, Dst, Src);
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unsigned Offset = MFI->getObjectOffset(I->getFrameIdx());
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unsigned Reg = MRI.getDwarfRegNum(I->getReg(), true);
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MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, Reg, Offset));
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}
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}
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}
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@ -40,6 +40,7 @@ void Mips16FrameLowering::emitPrologue(MachineFunction &MF) const {
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if (StackSize == 0 && !MFI->adjustsStack()) return;
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MachineModuleInfo &MMI = MF.getMMI();
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const MCRegisterInfo &MRI = MMI.getContext().getRegisterInfo();
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MachineLocation DstML, SrcML;
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// Adjust stack.
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@ -49,24 +50,20 @@ void Mips16FrameLowering::emitPrologue(MachineFunction &MF) const {
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MCSymbol *AdjustSPLabel = MMI.getContext().CreateTempSymbol();
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BuildMI(MBB, MBBI, dl,
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TII.get(TargetOpcode::PROLOG_LABEL)).addSym(AdjustSPLabel);
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DstML = MachineLocation(MachineLocation::VirtualFP);
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SrcML = MachineLocation(MachineLocation::VirtualFP, -StackSize);
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MMI.addFrameMove(AdjustSPLabel, DstML, SrcML);
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MMI.addFrameInst(
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MCCFIInstruction::createDefCfaOffset(AdjustSPLabel, -StackSize));
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MCSymbol *CSLabel = MMI.getContext().CreateTempSymbol();
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BuildMI(MBB, MBBI, dl,
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TII.get(TargetOpcode::PROLOG_LABEL)).addSym(CSLabel);
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DstML = MachineLocation(MachineLocation::VirtualFP, -8);
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SrcML = MachineLocation(Mips::S1);
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MMI.addFrameMove(CSLabel, DstML, SrcML);
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unsigned S1 = MRI.getDwarfRegNum(Mips::S1, true);
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MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, S1, -8));
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DstML = MachineLocation(MachineLocation::VirtualFP, -12);
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SrcML = MachineLocation(Mips::S0);
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MMI.addFrameMove(CSLabel, DstML, SrcML);
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unsigned S0 = MRI.getDwarfRegNum(Mips::S0, true);
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MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, S0, -12));
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DstML = MachineLocation(MachineLocation::VirtualFP, -4);
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SrcML = MachineLocation(Mips::RA);
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MMI.addFrameMove(CSLabel, DstML, SrcML);
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unsigned RA = MRI.getDwarfRegNum(Mips::RA, true);
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MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, RA, -4));
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if (hasFP(MF))
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BuildMI(MBB, MBBI, dl, TII.get(Mips::MoveR3216), Mips::S0)
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@ -262,6 +262,7 @@ void MipsSEFrameLowering::emitPrologue(MachineFunction &MF) const {
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if (StackSize == 0 && !MFI->adjustsStack()) return;
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MachineModuleInfo &MMI = MF.getMMI();
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const MCRegisterInfo &MRI = MMI.getContext().getRegisterInfo();
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MachineLocation DstML, SrcML;
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// Adjust stack.
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@ -271,9 +272,8 @@ void MipsSEFrameLowering::emitPrologue(MachineFunction &MF) const {
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MCSymbol *AdjustSPLabel = MMI.getContext().CreateTempSymbol();
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BuildMI(MBB, MBBI, dl,
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TII.get(TargetOpcode::PROLOG_LABEL)).addSym(AdjustSPLabel);
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DstML = MachineLocation(MachineLocation::VirtualFP);
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SrcML = MachineLocation(MachineLocation::VirtualFP, -StackSize);
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MMI.addFrameMove(AdjustSPLabel, DstML, SrcML);
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MMI.addFrameInst(
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MCCFIInstruction::createDefCfaOffset(AdjustSPLabel, -StackSize));
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const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
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@ -297,21 +297,22 @@ void MipsSEFrameLowering::emitPrologue(MachineFunction &MF) const {
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// If Reg is a double precision register, emit two cfa_offsets,
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// one for each of the paired single precision registers.
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if (Mips::AFGR64RegClass.contains(Reg)) {
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MachineLocation DstML0(MachineLocation::VirtualFP, Offset);
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MachineLocation DstML1(MachineLocation::VirtualFP, Offset + 4);
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MachineLocation SrcML0(RegInfo->getSubReg(Reg, Mips::sub_fpeven));
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MachineLocation SrcML1(RegInfo->getSubReg(Reg, Mips::sub_fpodd));
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unsigned Reg0 =
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MRI.getDwarfRegNum(RegInfo->getSubReg(Reg, Mips::sub_fpeven), true);
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unsigned Reg1 =
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MRI.getDwarfRegNum(RegInfo->getSubReg(Reg, Mips::sub_fpodd), true);
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if (!STI.isLittle())
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std::swap(SrcML0, SrcML1);
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std::swap(Reg0, Reg1);
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MMI.addFrameMove(CSLabel, DstML0, SrcML0);
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MMI.addFrameMove(CSLabel, DstML1, SrcML1);
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MMI.addFrameInst(
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MCCFIInstruction::createOffset(CSLabel, Reg0, Offset));
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MMI.addFrameInst(
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MCCFIInstruction::createOffset(CSLabel, Reg1, Offset + 4));
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} else {
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// Reg is either in CPURegs or FGR32.
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DstML = MachineLocation(MachineLocation::VirtualFP, Offset);
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SrcML = MachineLocation(Reg);
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MMI.addFrameMove(CSLabel, DstML, SrcML);
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MMI.addFrameInst(MCCFIInstruction::createOffset(
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CSLabel, MRI.getDwarfRegNum(Reg, 1), Offset));
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}
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}
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}
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@ -334,9 +335,8 @@ void MipsSEFrameLowering::emitPrologue(MachineFunction &MF) const {
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TII.get(TargetOpcode::PROLOG_LABEL)).addSym(CSLabel2);
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for (int I = 0; I < 4; ++I) {
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int64_t Offset = MFI->getObjectOffset(MipsFI->getEhDataRegFI(I));
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DstML = MachineLocation(MachineLocation::VirtualFP, Offset);
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SrcML = MachineLocation(ehDataReg(I));
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MMI.addFrameMove(CSLabel2, DstML, SrcML);
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unsigned Reg = MRI.getDwarfRegNum(ehDataReg(I), true);
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MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel2, Reg, Offset));
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}
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}
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@ -349,9 +349,8 @@ void MipsSEFrameLowering::emitPrologue(MachineFunction &MF) const {
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MCSymbol *SetFPLabel = MMI.getContext().CreateTempSymbol();
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BuildMI(MBB, MBBI, dl,
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TII.get(TargetOpcode::PROLOG_LABEL)).addSym(SetFPLabel);
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DstML = MachineLocation(FP);
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SrcML = MachineLocation(MachineLocation::VirtualFP);
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MMI.addFrameMove(SetFPLabel, DstML, SrcML);
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MMI.addFrameInst(MCCFIInstruction::createDefCfaRegister(
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SetFPLabel, MRI.getDwarfRegNum(FP, true)));
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}
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}
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@ -334,6 +334,7 @@ void PPCFrameLowering::emitPrologue(MachineFunction &MF) const {
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*static_cast<const PPCInstrInfo*>(MF.getTarget().getInstrInfo());
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MachineModuleInfo &MMI = MF.getMMI();
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const MCRegisterInfo &MRI = MMI.getContext().getRegisterInfo();
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DebugLoc dl;
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bool needsFrameMoves = MMI.hasDebugInfo() ||
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MF.getFunction()->needsUnwindTableEntry();
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@ -524,20 +525,21 @@ void PPCFrameLowering::emitPrologue(MachineFunction &MF) const {
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// Show update of SP.
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assert(NegFrameSize);
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MachineLocation SPDst(MachineLocation::VirtualFP);
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MachineLocation SPSrc(MachineLocation::VirtualFP, NegFrameSize);
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MMI.addFrameMove(FrameLabel, SPDst, SPSrc);
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MMI.addFrameInst(
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MCCFIInstruction::createDefCfaOffset(FrameLabel, NegFrameSize));
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if (HasFP) {
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MachineLocation FPDst(MachineLocation::VirtualFP, FPOffset);
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MachineLocation FPSrc(isPPC64 ? PPC::X31 : PPC::R31);
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MMI.addFrameMove(FrameLabel, FPDst, FPSrc);
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unsigned Reg = isPPC64 ? PPC::X31 : PPC::R31;
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Reg = MRI.getDwarfRegNum(Reg, true);
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MMI.addFrameInst(
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MCCFIInstruction::createOffset(FrameLabel, Reg, FPOffset));
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}
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if (MustSaveLR) {
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MachineLocation LRDst(MachineLocation::VirtualFP, LROffset);
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MachineLocation LRSrc(isPPC64 ? PPC::LR8 : PPC::LR);
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MMI.addFrameMove(FrameLabel, LRDst, LRSrc);
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unsigned Reg = isPPC64 ? PPC::LR8 : PPC::LR;
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Reg = MRI.getDwarfRegNum(Reg, true);
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MMI.addFrameInst(
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MCCFIInstruction::createOffset(FrameLabel, Reg, LROffset));
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}
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}
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@ -561,10 +563,10 @@ void PPCFrameLowering::emitPrologue(MachineFunction &MF) const {
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// Mark effective beginning of when frame pointer is ready.
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BuildMI(MBB, MBBI, dl, TII.get(PPC::PROLOG_LABEL)).addSym(ReadyLabel);
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MachineLocation FPDst(HasFP ? (isPPC64 ? PPC::X31 : PPC::R31) :
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(isPPC64 ? PPC::X1 : PPC::R1));
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MachineLocation FPSrc(MachineLocation::VirtualFP);
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MMI.addFrameMove(ReadyLabel, FPDst, FPSrc);
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unsigned Reg = HasFP ? (isPPC64 ? PPC::X31 : PPC::R31)
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: (isPPC64 ? PPC::X1 : PPC::R1);
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Reg = MRI.getDwarfRegNum(Reg, true);
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MMI.addFrameInst(MCCFIInstruction::createDefCfaRegister(ReadyLabel, Reg));
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}
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}
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@ -594,16 +596,14 @@ void PPCFrameLowering::emitPrologue(MachineFunction &MF) const {
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if (Subtarget.isSVR4ABI()
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&& Subtarget.isPPC64()
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&& (PPC::CR2 <= Reg && Reg <= PPC::CR4)) {
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MachineLocation CSDst(PPC::X1, 8);
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MachineLocation CSSrc(PPC::CR2);
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MMI.addFrameMove(Label, CSDst, CSSrc);
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MMI.addFrameInst(MCCFIInstruction::createOffset(
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Label, MRI.getDwarfRegNum(PPC::CR2, true), 8));
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continue;
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}
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int Offset = MFI->getObjectOffset(CSI[I].getFrameIdx());
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MachineLocation CSDst(MachineLocation::VirtualFP, Offset);
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MachineLocation CSSrc(Reg);
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MMI.addFrameMove(Label, CSDst, CSSrc);
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MMI.addFrameInst(MCCFIInstruction::createOffset(
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Label, MRI.getDwarfRegNum(Reg, true), Offset));
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}
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}
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}
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@ -297,6 +297,7 @@ void SystemZFrameLowering::emitPrologue(MachineFunction &MF) const {
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SystemZMachineFunctionInfo *ZFI = MF.getInfo<SystemZMachineFunctionInfo>();
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MachineBasicBlock::iterator MBBI = MBB.begin();
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MachineModuleInfo &MMI = MF.getMMI();
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const MCRegisterInfo &MRI = MMI.getContext().getRegisterInfo();
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const std::vector<CalleeSavedInfo> &CSI = MFFrame->getCalleeSavedInfo();
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bool HasFP = hasFP(MF);
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DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
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@ -320,9 +321,8 @@ void SystemZFrameLowering::emitPrologue(MachineFunction &MF) const {
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unsigned Reg = I->getReg();
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if (SystemZ::GR64BitRegClass.contains(Reg)) {
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int64_t Offset = SPOffsetFromCFA + RegSpillOffsets[Reg];
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MachineLocation StackSlot(MachineLocation::VirtualFP, Offset);
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MachineLocation RegValue(Reg);
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MMI.addFrameMove(GPRSaveLabel, StackSlot, RegValue);
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MMI.addFrameInst(MCCFIInstruction::createOffset(
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GPRSaveLabel, MRI.getDwarfRegNum(Reg, true), Offset));
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}
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}
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}
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@ -337,9 +337,8 @@ void SystemZFrameLowering::emitPrologue(MachineFunction &MF) const {
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MCSymbol *AdjustSPLabel = MMI.getContext().CreateTempSymbol();
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BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::PROLOG_LABEL))
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.addSym(AdjustSPLabel);
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MachineLocation FPDest(MachineLocation::VirtualFP);
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MachineLocation FPSrc(MachineLocation::VirtualFP, SPOffsetFromCFA + Delta);
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MMI.addFrameMove(AdjustSPLabel, FPDest, FPSrc);
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MMI.addFrameInst(MCCFIInstruction::createDefCfaOffset(
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AdjustSPLabel, SPOffsetFromCFA + Delta));
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SPOffsetFromCFA += Delta;
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}
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@ -352,9 +351,9 @@ void SystemZFrameLowering::emitPrologue(MachineFunction &MF) const {
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MCSymbol *SetFPLabel = MMI.getContext().CreateTempSymbol();
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BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::PROLOG_LABEL))
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.addSym(SetFPLabel);
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MachineLocation HardFP(SystemZ::R11D);
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MachineLocation VirtualFP(MachineLocation::VirtualFP);
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MMI.addFrameMove(SetFPLabel, HardFP, VirtualFP);
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unsigned HardFP = MRI.getDwarfRegNum(SystemZ::R11D, true);
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MMI.addFrameInst(
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MCCFIInstruction::createDefCfaRegister(SetFPLabel, HardFP));
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// Mark the FramePtr as live at the beginning of every block except
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// the entry block. (We'll have marked R11 as live on entry when
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@ -380,12 +379,10 @@ void SystemZFrameLowering::emitPrologue(MachineFunction &MF) const {
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// Add CFI for the this save.
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if (!FPRSaveLabel)
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FPRSaveLabel = MMI.getContext().CreateTempSymbol();
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unsigned Reg = I->getReg();
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unsigned Reg = MRI.getDwarfRegNum(I->getReg(), true);
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int64_t Offset = getFrameIndexOffset(MF, I->getFrameIdx());
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MachineLocation Slot(MachineLocation::VirtualFP,
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SPOffsetFromCFA + Offset);
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MachineLocation RegValue(Reg);
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MMI.addFrameMove(FPRSaveLabel, Slot, RegValue);
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MMI.addFrameInst(MCCFIInstruction::createOffset(
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FPRSaveLabel, Reg, SPOffsetFromCFA + Offset));
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}
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}
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// Complete the CFI for the FPR saves, modelling them as taking effect
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@ -307,6 +307,7 @@ void X86FrameLowering::emitCalleeSavedFrameMoves(MachineFunction &MF,
|
|||
unsigned FramePtr) const {
|
||||
MachineFrameInfo *MFI = MF.getFrameInfo();
|
||||
MachineModuleInfo &MMI = MF.getMMI();
|
||||
const MCRegisterInfo &MRI = MMI.getContext().getRegisterInfo();
|
||||
|
||||
// Add callee saved registers to move list.
|
||||
const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
|
||||
|
@ -359,9 +360,8 @@ void X86FrameLowering::emitCalleeSavedFrameMoves(MachineFunction &MF,
|
|||
if (HasFP && FramePtr == Reg)
|
||||
continue;
|
||||
|
||||
MachineLocation CSDst(MachineLocation::VirtualFP, Offset);
|
||||
MachineLocation CSSrc(Reg);
|
||||
MMI.addFrameMove(Label, CSDst, CSSrc);
|
||||
unsigned DwarfReg = MRI.getDwarfRegNum(Reg, true);
|
||||
MMI.addFrameInst(MCCFIInstruction::createOffset(Label, DwarfReg, Offset));
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -764,14 +764,13 @@ void X86FrameLowering::emitPrologue(MachineFunction &MF) const {
|
|||
|
||||
// Define the current CFA rule to use the provided offset.
|
||||
assert(StackSize);
|
||||
MachineLocation SPDst(MachineLocation::VirtualFP);
|
||||
MachineLocation SPSrc(MachineLocation::VirtualFP, 2 * stackGrowth);
|
||||
MMI.addFrameMove(FrameLabel, SPDst, SPSrc);
|
||||
MMI.addFrameInst(
|
||||
MCCFIInstruction::createDefCfaOffset(FrameLabel, 2 * stackGrowth));
|
||||
|
||||
// Change the rule for the FramePtr to be an "offset" rule.
|
||||
MachineLocation FPDst(MachineLocation::VirtualFP, 2 * stackGrowth);
|
||||
MachineLocation FPSrc(FramePtr);
|
||||
MMI.addFrameMove(FrameLabel, FPDst, FPSrc);
|
||||
unsigned DwarfFramePtr = RegInfo->getDwarfRegNum(FramePtr, true);
|
||||
MMI.addFrameInst(MCCFIInstruction::createOffset(FrameLabel, DwarfFramePtr,
|
||||
2 * stackGrowth));
|
||||
}
|
||||
|
||||
// Update EBP with the new base value.
|
||||
|
@ -787,9 +786,9 @@ void X86FrameLowering::emitPrologue(MachineFunction &MF) const {
|
|||
.addSym(FrameLabel);
|
||||
|
||||
// Define the current CFA to use the EBP/RBP register.
|
||||
MachineLocation FPDst(FramePtr);
|
||||
MachineLocation FPSrc(MachineLocation::VirtualFP);
|
||||
MMI.addFrameMove(FrameLabel, FPDst, FPSrc);
|
||||
unsigned DwarfFramePtr = RegInfo->getDwarfRegNum(FramePtr, true);
|
||||
MMI.addFrameInst(
|
||||
MCCFIInstruction::createDefCfaRegister(FrameLabel, DwarfFramePtr));
|
||||
}
|
||||
|
||||
// Mark the FramePtr as live-in in every block except the entry.
|
||||
|
@ -818,10 +817,8 @@ void X86FrameLowering::emitPrologue(MachineFunction &MF) const {
|
|||
|
||||
// Define the current CFA rule to use the provided offset.
|
||||
assert(StackSize);
|
||||
unsigned Ptr = MachineLocation::VirtualFP;
|
||||
MachineLocation SPDst(Ptr);
|
||||
MachineLocation SPSrc(Ptr, StackOffset);
|
||||
MMI.addFrameMove(Label, SPDst, SPSrc);
|
||||
MMI.addFrameInst(
|
||||
MCCFIInstruction::createDefCfaOffset(Label, StackOffset));
|
||||
StackOffset += stackGrowth;
|
||||
}
|
||||
}
|
||||
|
@ -956,10 +953,8 @@ void X86FrameLowering::emitPrologue(MachineFunction &MF) const {
|
|||
if (!HasFP && NumBytes) {
|
||||
// Define the current CFA rule to use the provided offset.
|
||||
assert(StackSize);
|
||||
MachineLocation SPDst(MachineLocation::VirtualFP);
|
||||
MachineLocation SPSrc(MachineLocation::VirtualFP,
|
||||
-StackSize + stackGrowth);
|
||||
MMI.addFrameMove(Label, SPDst, SPSrc);
|
||||
MMI.addFrameInst(MCCFIInstruction::createDefCfaOffset(
|
||||
Label, -StackSize + stackGrowth));
|
||||
}
|
||||
|
||||
// Emit DWARF info specifying the offsets of the callee-saved registers.
|
||||
|
|
Loading…
Reference in New Issue