forked from OSchip/llvm-project
Remove unnecessary Implicit Defs. Since r0 is not in allocation, we do not
have to inform the register allocator it might be stepped on. llvm-svn: 21202
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2de306ba83
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b076731713
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@ -84,10 +84,8 @@ PPC32RegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
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unsigned OC = Opcode[getIdx(getClass(SrcReg))];
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if (SrcReg == PPC::LR) {
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BuildMI(MBB, MI, PPC::MFLR, 1, PPC::R11).addReg(PPC::LR);
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BuildMI(MBB, MI, PPC::IMPLICIT_DEF, 0, PPC::R0);
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addFrameReference(BuildMI(MBB, MI, OC, 3).addReg(PPC::R11),FrameIdx);
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} else {
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BuildMI(MBB, MI, PPC::IMPLICIT_DEF, 0, PPC::R0);
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addFrameReference(BuildMI(MBB, MI, OC, 3).addReg(SrcReg),FrameIdx);
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}
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}
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@ -101,11 +99,9 @@ PPC32RegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
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};
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unsigned OC = Opcode[getIdx(getClass(DestReg))];
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if (DestReg == PPC::LR) {
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BuildMI(MBB, MI, PPC::IMPLICIT_DEF, 0, PPC::R0);
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addFrameReference(BuildMI(MBB, MI, OC, 2, PPC::R11), FrameIdx);
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BuildMI(MBB, MI, PPC::MTLR, 1).addReg(PPC::R11);
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} else {
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BuildMI(MBB, MI, PPC::IMPLICIT_DEF, 0, PPC::R0);
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addFrameReference(BuildMI(MBB, MI, OC, 2, DestReg), FrameIdx);
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}
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}
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