forked from OSchip/llvm-project
[MSP430] Fix PR33050: Don't use ADD16ri to lower FrameIndex.
Use ADDframe pseudo instruction instead. This will fix machine verifier error, and will help to fix PR32146. Differential Revision: https://reviews.llvm.org/D33452 llvm-svn: 303758
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@ -403,12 +403,12 @@ void MSP430DAGToDAGISel::Select(SDNode *Node) {
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int FI = cast<FrameIndexSDNode>(Node)->getIndex();
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SDValue TFI = CurDAG->getTargetFrameIndex(FI, MVT::i16);
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if (Node->hasOneUse()) {
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CurDAG->SelectNodeTo(Node, MSP430::ADD16ri, MVT::i16, TFI,
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CurDAG->SelectNodeTo(Node, MSP430::ADDframe, MVT::i16, TFI,
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CurDAG->getTargetConstant(0, dl, MVT::i16));
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return;
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}
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ReplaceNode(Node, CurDAG->getMachineNode(
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MSP430::ADD16ri, dl, MVT::i16, TFI,
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MSP430::ADDframe, dl, MVT::i16, TFI,
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CurDAG->getTargetConstant(0, dl, MVT::i16)));
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return;
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}
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@ -122,6 +122,11 @@ def ADJCALLSTACKUP : Pseudo<(outs), (ins i16imm:$amt1, i16imm:$amt2),
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[(MSP430callseq_end timm:$amt1, timm:$amt2)]>;
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}
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let Defs = [SR], Uses = [SP] in {
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def ADDframe : Pseudo<(outs GR16:$dst), (ins i16imm:$base, i16imm:$offset),
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"# ADDframe PSEUDO", []>;
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}
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let usesCustomInserter = 1 in {
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let Uses = [SR] in {
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def Select8 : Pseudo<(outs GR8:$dst), (ins GR8:$src, GR8:$src2, i8imm:$cc),
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@ -127,7 +127,7 @@ MSP430RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
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// Fold imm into offset
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Offset += MI.getOperand(FIOperandNum + 1).getImm();
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if (MI.getOpcode() == MSP430::ADD16ri) {
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if (MI.getOpcode() == MSP430::ADDframe) {
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// This is actually "load effective address" of the stack slot
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// instruction. We have only two-address instructions, thus we need to
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// expand it into mov + add
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@ -1,4 +1,4 @@
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; RUN: llc < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs < %s | FileCheck %s
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target datalayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"
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target triple = "msp430---elf"
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