forked from OSchip/llvm-project
parent
a3a135a9f7
commit
b0713c74a2
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@ -992,18 +992,31 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
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case 1: return getNode(Opcode, VT, Children[0]);
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case 2: return getNode(Opcode, VT, Children[0], Children[1]);
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case 3: return getNode(Opcode, VT, Children[0], Children[1], Children[2]);
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default:
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// FIXME: MEMOIZE!!
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SDNode *N = new SDNode(Opcode, Children);
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if (Opcode != ISD::ADD_PARTS && Opcode != ISD::SUB_PARTS) {
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N->setValueTypes(VT);
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} else {
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std::vector<MVT::ValueType> V(N->getNumOperands()/2, VT);
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N->setValueTypes(V);
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}
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AllNodes.push_back(N);
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return SDOperand(N, 0);
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default: break;
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}
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ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(Children[1].Val);
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switch (Opcode) {
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default: break;
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case ISD::BRCONDTWOWAY:
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if (N1C)
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if (N1C->getValue()) // Unconditional branch to true dest.
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return getNode(ISD::BR, MVT::Other, Children[0], Children[2]);
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else // Unconditional branch to false dest.
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return getNode(ISD::BR, MVT::Other, Children[0], Children[3]);
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break;
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}
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// FIXME: MEMOIZE!!
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SDNode *N = new SDNode(Opcode, Children);
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if (Opcode != ISD::ADD_PARTS && Opcode != ISD::SUB_PARTS) {
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N->setValueTypes(VT);
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} else {
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std::vector<MVT::ValueType> V(N->getNumOperands()/2, VT);
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N->setValueTypes(V);
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}
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AllNodes.push_back(N);
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return SDOperand(N, 0);
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}
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SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,SDOperand N1,
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@ -1243,6 +1256,7 @@ const char *SDNode::getOperationName() const {
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// Control flow instructions
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case ISD::BR: return "br";
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case ISD::BRCOND: return "brcond";
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case ISD::BRCONDTWOWAY: return "brcondtwoway";
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case ISD::RET: return "ret";
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case ISD::CALL: return "call";
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case ISD::ADJCALLSTACKDOWN: return "adjcallstackdown";
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