forked from OSchip/llvm-project
parent
c0daf5fe53
commit
b039c60889
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@ -263,20 +263,13 @@ def zero_reg;
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/// PredicateOperand - This can be used to define a predicate operand for an
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/// PredicateOperand - This can be used to define a predicate operand for an
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/// instruction. OpTypes specifies the MIOperandInfo for the operand, and
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/// instruction. OpTypes specifies the MIOperandInfo for the operand, and
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/// AlwaysVal specifies the value of this predicate when set to "always
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/// AlwaysVal specifies the value of this predicate when set to "always
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/// execute". If isImmutable is true, then the operand should not change
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/// execute".
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/// after instruction selection.
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class PredicateOperand<ValueType ty, dag OpTypes, dag AlwaysVal>
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class PredicateOperand<ValueType ty, dag OpTypes, dag AlwaysVal>
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: Operand<ty> {
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: Operand<ty> {
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let MIOperandInfo = OpTypes;
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let MIOperandInfo = OpTypes;
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bit isImmutable = 0;
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dag DefaultOps = AlwaysVal;
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dag DefaultOps = AlwaysVal;
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}
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}
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class ImmutablePredicateOperand<ValueType ty, dag OpTypes, dag AlwaysVal>
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: PredicateOperand<ty, OpTypes, AlwaysVal> {
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let isImmutable = 1;
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}
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/// OptionalDefOperand - This is used to define a optional definition operand
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/// OptionalDefOperand - This is used to define a optional definition operand
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/// for an instruction. DefaultOps is the register the operand represents if none
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/// for an instruction. DefaultOps is the register the operand represents if none
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/// is supplied, e.g. zero_reg.
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/// is supplied, e.g. zero_reg.
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