forked from OSchip/llvm-project
parent
5b663e7b53
commit
aff3e03765
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@ -1463,7 +1463,7 @@ SDValue DAGCombiner::visitUDIV(SDNode *N) {
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return DAG.FoldConstantArithmetic(ISD::UDIV, VT, N0C, N1C);
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// fold (udiv x, (1 << c)) -> x >>u c
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if (N1C && N1C->getAPIntValue().isPowerOf2())
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return DAG.getNode(ISD::SRL, VT, N0,
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return DAG.getNode(ISD::SRL, N->getDebugLoc(), VT, N0,
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DAG.getConstant(N1C->getAPIntValue().logBase2(),
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TLI.getShiftAmountTy()));
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// fold (udiv x, (shl c, y)) -> x >>u (log2(c)+y) iff c is power of 2
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@ -1471,12 +1471,13 @@ SDValue DAGCombiner::visitUDIV(SDNode *N) {
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if (ConstantSDNode *SHC = dyn_cast<ConstantSDNode>(N1.getOperand(0))) {
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if (SHC->getAPIntValue().isPowerOf2()) {
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MVT ADDVT = N1.getOperand(1).getValueType();
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SDValue Add = DAG.getNode(ISD::ADD, ADDVT, N1.getOperand(1),
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DAG.getConstant(SHC->getAPIntValue()
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.logBase2(),
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ADDVT));
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SDValue Add = DAG.getNode(ISD::ADD, N->getDebugLoc(), ADDVT,
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N1.getOperand(1),
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DAG.getConstant(SHC->getAPIntValue()
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.logBase2(),
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ADDVT));
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AddToWorkList(Add.getNode());
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return DAG.getNode(ISD::SRL, VT, N0, Add);
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return DAG.getNode(ISD::SRL, N->getDebugLoc(), VT, N0, Add);
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}
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}
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}
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