diff --git a/llvm/lib/Analysis/LiveVar/FunctionLiveVarInfo.cpp b/llvm/lib/Analysis/LiveVar/FunctionLiveVarInfo.cpp
index edf68868d47b..110564061242 100644
--- a/llvm/lib/Analysis/LiveVar/FunctionLiveVarInfo.cpp
+++ b/llvm/lib/Analysis/LiveVar/FunctionLiveVarInfo.cpp
@@ -11,17 +11,22 @@
 #include "llvm/Support/CFG.h"
 #include "Support/PostOrderIterator.h"
 #include "Support/SetOperations.h"
+#include "Support/CommandLine.h"
 #include <iostream>
 
 AnalysisID FunctionLiveVarInfo::ID(AnalysisID::create<FunctionLiveVarInfo>());
 
-cl::Enum<LiveVarDebugLevel_t> DEBUG_LV("dlivevar", cl::Hidden,
+LiveVarDebugLevel_t DEBUG_LV;
+
+static cl::Enum<LiveVarDebugLevel_t> DEBUG_LV_opt(DEBUG_LV, "dlivevar", cl::Hidden,
   "enable live-variable debugging information",
   clEnumValN(LV_DEBUG_None   , "n", "disable debug output"),
   clEnumValN(LV_DEBUG_Normal , "y", "enable debug output"),
   clEnumValN(LV_DEBUG_Instr,   "i", "print live-var sets before/after every machine instrn"),
   clEnumValN(LV_DEBUG_Verbose, "v", "print def, use sets for every instrn also"), 0);
 
+
+
 //-----------------------------------------------------------------------------
 // Accessor Functions
 //-----------------------------------------------------------------------------
diff --git a/llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp b/llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp
index 0a6d1ce35393..2d2bc147268f 100644
--- a/llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp
+++ b/llvm/lib/CodeGen/InstrSched/InstrScheduling.cpp
@@ -13,13 +13,14 @@
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/BasicBlock.h"
 #include "llvm/Instruction.h"
+#include "Support/CommandLine.h"
 #include <algorithm>
 using std::cerr;
 using std::vector;
 
-//************************* External Data Types *****************************/
+SchedDebugLevel_t SchedDebugLevel;
 
-cl::Enum<enum SchedDebugLevel_t> SchedDebugLevel("dsched", cl::Hidden,
+static cl::Enum<enum SchedDebugLevel_t> Opt(SchedDebugLevel,"dsched",cl::Hidden,
   "enable instruction scheduling debugging information",
   clEnumValN(Sched_NoDebugInfo,      "n", "disable debug output"),
   clEnumValN(Sched_Disable,        "off", "disable instruction scheduling"),
diff --git a/llvm/lib/CodeGen/InstrSched/SchedPriorities.h b/llvm/lib/CodeGen/InstrSched/SchedPriorities.h
index 3f087d52249f..a34557ca1542 100644
--- a/llvm/lib/CodeGen/InstrSched/SchedPriorities.h
+++ b/llvm/lib/CodeGen/InstrSched/SchedPriorities.h
@@ -24,7 +24,6 @@
 #include "SchedGraph.h"
 #include "llvm/CodeGen/InstrScheduling.h"
 #include "llvm/Target/MachineSchedInfo.h"
-#include "Support/CommandLine.h"
 #include <list>
 #include <ext/hash_set>
 #include <iostream>
@@ -44,7 +43,7 @@ enum SchedDebugLevel_t {
   Sched_PrintSchedGraphs,
 };
 
-extern cl::Enum<SchedDebugLevel_t> SchedDebugLevel;
+extern SchedDebugLevel_t SchedDebugLevel;
 
 //---------------------------------------------------------------------------
 // Function: instrIsFeasible
diff --git a/llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp b/llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
index ab9b1a7b1765..bd0db117f0fe 100644
--- a/llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
+++ b/llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
@@ -24,15 +24,14 @@
 #include "llvm/Type.h"
 #include "llvm/iOther.h"
 #include "llvm/CodeGen/RegAllocCommon.h"
+#include "Support/CommandLine.h"
 #include <iostream>
 #include <math.h>
 using std::cerr;
 
-
-// ***TODO: There are several places we add instructions. Validate the order
-//          of adding these instructions.
-
-cl::Enum<RegAllocDebugLevel_t> DEBUG_RA("dregalloc", cl::Hidden,
+RegAllocDebugLevel_t DEBUG_RA;
+static cl::Enum<RegAllocDebugLevel_t> DEBUG_RA_c(DEBUG_RA, "dregalloc",
+                                                 cl::Hidden,
   "enable register allocation debugging information",
   clEnumValN(RA_DEBUG_None   , "n", "disable debug output"),
   clEnumValN(RA_DEBUG_Normal , "y", "enable debug output"),