forked from OSchip/llvm-project
Mark the Defs and Uses of STATUS register correctly, plus some reformatting.
llvm-svn: 66540
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1c94228de3
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@ -123,6 +123,7 @@ include "PIC16InstrFormats.td"
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//===----------------------------------------------------------------------===//
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// W = W Op F : Load the value from F and do Op to W.
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let isTwoAddress = 1 in
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class BinOpFW<bits<6> OpCode, string OpcStr, SDNode OpNode>:
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ByteFormat<OpCode, (outs GPR:$dst),
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(ins GPR:$src, i8imm:$offset, i8mem:$ptrlo, i8imm:$ptrhi),
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@ -132,6 +133,9 @@ class BinOpFW<bits<6> OpCode, string OpcStr, SDNode OpNode>:
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(i8 imm:$offset))))]>;
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// F = F Op W : Load the value from F, do op with W and store in F.
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// This insn class is not marked as TwoAddress because the reg is
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// being used as a source operand only. (Remember a TwoAddress insn
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// needs a copyRegToReg.)
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class BinOpWF<bits<6> OpCode, string OpcStr, SDNode OpNode>:
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ByteFormat<OpCode, (outs),
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(ins GPR:$src, i8imm:$offset, i8mem:$ptrlo, i8imm:$ptrhi),
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@ -144,6 +148,7 @@ class BinOpWF<bits<6> OpCode, string OpcStr, SDNode OpNode>:
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)]>;
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// W = W Op L : Do Op of L with W and place result in W.
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let isTwoAddress = 1 in
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class BinOpLW<bits<6> opcode, string OpcStr, SDNode OpNode> :
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LiteralFormat<opcode, (outs GPR:$dst),
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(ins GPR:$src, i8imm:$literal),
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@ -200,6 +205,12 @@ def set_fsrhi:
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"movwf ${dst}H",
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[]>;
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//----------------------------
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// copyRegToReg
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// copyRegToReg insns. These are dummy. They should always be deleted
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// by the optimizer and never be present in the final generated code.
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// if they are, then we have to write correct macros for these insns.
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//----------------------------
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def copy_fsr:
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Pseudo<(outs FSR16:$dst), (ins FSR16:$src), "copy_fsr $dst, $src", []>;
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@ -209,28 +220,26 @@ def copy_w:
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//--------------------------
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// Store to memory
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//-------------------------
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// Direct store.
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def movwf :
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// Input operands are: val = W, ptrlo = GA, offset = offset, ptrhi = banksel.
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class MOVWF_INSN<bits<6> OpCode, SDNode OpNodeDest, SDNode Op>:
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ByteFormat<0, (outs),
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(ins GPR:$val, i8imm:$offset, i8mem:$ptrlo, i8imm:$ptrhi),
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"movwf ${ptrlo} + ${offset}",
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[(PIC16Store GPR:$val, tglobaladdr:$ptrlo, (i8 imm:$ptrhi),
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[(Op GPR:$val, OpNodeDest:$ptrlo, (i8 imm:$ptrhi),
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(i8 imm:$offset))]>;
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def movwf_1 :
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ByteFormat<0, (outs),
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(ins GPR:$val, i8mem:$ptrlo, i8imm:$ptrhi, i8imm:$offset),
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"movwf ${ptrlo} + ${offset}",
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[(PIC16Store GPR:$val, texternalsym:$ptrlo, (i8 imm:$ptrhi),
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(i8 imm:$offset))]>;
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// Store W to a Global Address.
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def movwf : MOVWF_INSN<0, tglobaladdr, PIC16Store>;
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// Store W to an External Symobol.
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def movwf_1 : MOVWF_INSN<0, texternalsym, PIC16Store>;
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// Store with InFlag and OutFlag
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def movwf_2 :
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ByteFormat<0, (outs),
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(ins GPR:$val, i8mem:$ptrlo, i8imm:$ptrhi, i8imm:$offset),
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"movwf ${ptrlo} + ${offset}",
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[(PIC16StWF GPR:$val, texternalsym:$ptrlo, (i8 imm:$ptrhi),
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(i8 imm:$offset))]>;
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// This is same as movwf_1 but has a flag. A flag is required to
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// order the stores while passing the params to function.
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def movwf_2 : MOVWF_INSN<0, texternalsym, PIC16StWF>;
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// Indirect store. Matched via a DAG replacement pattern.
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def store_indirect :
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@ -243,31 +252,26 @@ def store_indirect :
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// Load from memory
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//----------------------------
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// Direct load.
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def movf :
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// Input Operands are: ptrlo = GA, offset = offset, ptrhi = banksel.
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// Output: dst = W
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class MOVF_INSN<bits<6> OpCode, SDNode OpNodeSrc, SDNode Op>:
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ByteFormat<0, (outs GPR:$dst),
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(ins i8imm:$offset, i8mem:$ptrlo, i8imm:$ptrhi),
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"movf ${ptrlo} + ${offset}, W",
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[(set GPR:$dst,
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(PIC16Load tglobaladdr:$ptrlo, (i8 imm:$ptrhi),
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(Op OpNodeSrc:$ptrlo, (i8 imm:$ptrhi),
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(i8 imm:$offset)))]>;
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def movf_1 :
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ByteFormat<0, (outs GPR:$dst),
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(ins i8mem:$ptrlo, i8imm:$ptrhi, i8imm:$offset),
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"movf ${ptrlo} + ${offset}, W",
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[(set GPR:$dst,
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(PIC16Load texternalsym:$ptrlo, (i8 imm:$ptrhi),
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(i8 imm:$offset)))]>;
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// Load from a GA.
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def movf : MOVF_INSN<0, tglobaladdr, PIC16Load>;
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// Load from an ES.
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def movf_1 : MOVF_INSN<0, texternalsym, PIC16Load>;
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// Load with InFlag and OutFlag
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def movf_2 :
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ByteFormat<0, (outs GPR:$dst),
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(ins i8mem:$ptrlo, i8imm:$ptrhi, i8imm:$offset),
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"movf ${ptrlo} + ${offset}, W",
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[(set GPR:$dst,
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(PIC16LdWF texternalsym:$ptrlo, (i8 imm:$ptrhi),
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(i8 imm:$offset)))]>;
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// This is same as movf_1 but has a flag. A flag is required to
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// order the loads while copying the return value of a function.
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def movf_2 : MOVF_INSN<0, texternalsym, PIC16LdWF>;
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// Indirect load. Matched via a DAG replacement pattern.
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def load_indirect :
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@ -279,12 +283,13 @@ def load_indirect :
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//-------------------------
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// Bitwise operations patterns
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//--------------------------
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let isTwoAddress = 1 in {
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// W = W op [F]
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let Defs = [STATUS] in {
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def OrFW : BinOpFW<0, "iorwf", or>;
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def XOrFW : BinOpFW<0, "xorwf", xor>;
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def AndFW : BinOpFW<0, "andwf", and>;
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}
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// F = W op [F]
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def OrWF : BinOpWF<0, "iorwf", or>;
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def XOrWF : BinOpWF<0, "xorwf", xor>;
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def AndWF : BinOpWF<0, "andwf", and>;
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@ -293,17 +298,22 @@ def AndWF : BinOpWF<0, "andwf", and>;
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// Various add/sub patterns.
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//-------------------------
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let isTwoAddress = 1 in {
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// W = W + [F]
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def addfw_1: BinOpFW<0, "addwf", add>;
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def addfw_2: BinOpFW<0, "addwf", addc>;
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def addfwc: BinOpFW<0, "addwfc", adde>; // With Carry.
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}
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let Uses = [STATUS] in
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def addfwc: BinOpFW<0, "addwfc", adde>; // With Carry.
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// F = W + [F]
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def addwf_1: BinOpWF<0, "addwf", add>;
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def addwf_2: BinOpWF<0, "addwf", addc>;
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let Uses = [STATUS] in
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def addwfc: BinOpWF<0, "addwfc", adde>; // With Carry.
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}
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// W -= [F] ; load from F and sub the value from W.
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let isTwoAddress = 1 in
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class SUBFW<bits<6> OpCode, string OpcStr, SDNode OpNode>:
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ByteFormat<OpCode, (outs GPR:$dst),
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(ins GPR:$src, i8imm:$offset, i8mem:$ptrlo, i8imm:$ptrhi),
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@ -311,10 +321,13 @@ class SUBFW<bits<6> OpCode, string OpcStr, SDNode OpNode>:
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[(set GPR:$dst, (OpNode (PIC16Load diraddr:$ptrlo,
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(i8 imm:$ptrhi), (i8 imm:$offset)),
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GPR:$src))]>;
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let isTwoAddress = 1 in {
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let Defs = [STATUS] in {
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def subfw_1: SUBFW<0, "subwf", sub>;
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def subfw_2: SUBFW<0, "subwf", subc>;
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let Uses = [STATUS] in
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def subfwb: SUBFW<0, "subwfb", sube>; // With Borrow.
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def subfw_cc: SUBFW<0, "subwf", PIC16Subcc>;
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}
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@ -328,20 +341,25 @@ class SUBWF<bits<6> OpCode, string OpcStr, SDNode OpNode>:
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GPR:$src), diraddr:$ptrlo,
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(i8 imm:$ptrhi), (i8 imm:$offset))]>;
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let Defs = [STATUS] in {
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def subwf_1: SUBWF<0, "subwf", sub>;
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def subwf_2: SUBWF<0, "subwf", subc>;
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def subwfb: SUBWF<0, "subwfb", sube>; // With Borrow.
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def subwf_cc: SUBWF<0, "subwf", PIC16Subcc>;
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// addlw
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let isTwoAddress = 1 in {
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def addlw_1 : BinOpLW<0, "addlw", add>;
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def addlw_2 : BinOpLW<0, "addlw", addc>;
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def addlwc : BinOpLW<0, "addlwc", adde>; // With Carry. (Assembler macro).
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let Uses = [STATUS] in
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def subwfb: SUBWF<0, "subwfb", sube>; // With Borrow.
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def subwf_cc: SUBWF<0, "subwf", PIC16Subcc>;
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}
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// addlw
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let Defs = [STATUS] in {
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def addlw_1 : BinOpLW<0, "addlw", add>;
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def addlw_2 : BinOpLW<0, "addlw", addc>;
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let Uses = [STATUS] in
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def addlwc : BinOpLW<0, "addlwc", adde>; // With Carry. (Assembler macro).
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// bitwise operations involving a literal and w.
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let isTwoAddress = 1 in {
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def andlw : BinOpLW<0, "andlw", and>;
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def xorlw : BinOpLW<0, "xorlw", xor>;
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def orlw : BinOpLW<0, "iorlw", or>;
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@ -349,13 +367,14 @@ def orlw : BinOpLW<0, "iorlw", or>;
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// sublw
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// W = C - W ; sub W from literal. (Without borrow).
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let isTwoAddress = 1 in
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class SUBLW<bits<6> opcode, SDNode OpNode> :
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LiteralFormat<opcode, (outs GPR:$dst),
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(ins GPR:$src, i8imm:$literal),
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"sublw $literal",
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[(set GPR:$dst, (OpNode (i8 imm:$literal), GPR:$src))]>;
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let isTwoAddress = 1 in {
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let Defs = [STATUS] in {
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def sublw_1 : SUBLW<0, sub>;
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def sublw_2 : SUBLW<0, subc>;
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def sublw_cc : SUBLW<0, PIC16Subcc>;
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@ -368,6 +387,7 @@ let isCall = 1 in {
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[(PIC16call diraddr:$func)]>;
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}
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let Uses = [STATUS] in
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def pic16brcond: ControlFormat<0x0, (outs), (ins brtarget:$dst, CCOp:$cc),
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"b$cc $dst",
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[(PIC16Brcond bb:$dst, imm:$cc)]>;
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