forked from OSchip/llvm-project
[CodeGen] Print predecessors, successors, then liveins in -debug printing
Reorder them to match MIR. Predecessors are only comments, and they're not usually printed in MIR. llvm-svn: 325166
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@ -325,18 +325,16 @@ void MachineBasicBlock::print(raw_ostream &OS, ModuleSlotTracker &MST,
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const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo();
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const MachineRegisterInfo &MRI = MF->getRegInfo();
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const TargetInstrInfo &TII = *getParent()->getSubtarget().getInstrInfo();
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if (!livein_empty() && MRI.tracksLiveness()) {
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if (Indexes) OS << '\t';
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OS.indent(2) << "liveins: ";
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bool First = true;
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for (const auto &LI : liveins()) {
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if (!First)
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// Print the preds of this block according to the CFG.
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if (!pred_empty()) {
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if (Indexes) OS << '\t';
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// Don't indent(2), align with previous line attributes.
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OS << "; predecessors: ";
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for (auto I = pred_begin(), E = pred_end(); I != E; ++I) {
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if (I != pred_begin())
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OS << ", ";
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First = false;
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OS << printReg(LI.PhysReg, TRI);
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if (!LI.LaneMask.all())
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OS << ":0x" << PrintLaneMask(LI.LaneMask);
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OS << printMBBReference(**I);
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}
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OS << '\n';
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}
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@ -372,15 +370,18 @@ void MachineBasicBlock::print(raw_ostream &OS, ModuleSlotTracker &MST,
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}
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}
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// Print the preds of this block according to the CFG.
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if (!pred_empty()) {
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if (!livein_empty() && MRI.tracksLiveness()) {
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if (Indexes) OS << '\t';
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// Don't indent(2), align with previous line attributes.
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OS << "; predecessors: ";
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for (auto I = pred_begin(), E = pred_end(); I != E; ++I) {
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if (I != pred_begin())
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OS.indent(2) << "liveins: ";
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bool First = true;
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for (const auto &LI : liveins()) {
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if (!First)
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OS << ", ";
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OS << printMBBReference(**I);
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First = false;
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OS << printReg(LI.PhysReg, TRI);
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if (!LI.LaneMask.all())
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OS << ":0x" << PrintLaneMask(LI.LaneMask);
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}
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OS << '\n';
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}
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