[x86] Support 3 builtin functions for 32-bits mode

_mm_cvtsi128_si64, _mm_cvtsi64_si128, _mm_extract_epi64

Reviewed By:RKSimon, Topper Craig
Differential Revision: https://reviews.llvm.org/D124067
This commit is contained in:
Xiang1 Zhang 2022-04-22 09:40:00 +08:00
parent 7493d9ffb6
commit afa536e33e
6 changed files with 13 additions and 21 deletions

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@ -261,6 +261,7 @@ TARGET_BUILTIN(__builtin_ia32_packsswb128, "V16cV8sV8s", "ncV:128:", "sse2")
TARGET_BUILTIN(__builtin_ia32_packssdw128, "V8sV4iV4i", "ncV:128:", "sse2")
TARGET_BUILTIN(__builtin_ia32_packuswb128, "V16cV8sV8s", "ncV:128:", "sse2")
TARGET_BUILTIN(__builtin_ia32_pmulhuw128, "V8sV8sV8s", "ncV:128:", "sse2")
TARGET_BUILTIN(__builtin_ia32_vec_ext_v2di, "OiV2OiIi", "ncV:128:", "sse2")
TARGET_BUILTIN(__builtin_ia32_vec_ext_v4si, "iV4iIi", "ncV:128:", "sse2")
TARGET_BUILTIN(__builtin_ia32_vec_ext_v4sf, "fV4fIi", "ncV:128:", "sse2")
TARGET_BUILTIN(__builtin_ia32_vec_ext_v8hi, "sV8sIi", "ncV:128:", "sse2")

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@ -42,7 +42,6 @@ TARGET_BUILTIN(__builtin_ia32_cvttss2si64, "OiV4f", "ncV:128:", "sse")
TARGET_BUILTIN(__builtin_ia32_cvtsd2si64, "OiV2d", "ncV:128:", "sse2")
TARGET_BUILTIN(__builtin_ia32_cvttsd2si64, "OiV2d", "ncV:128:", "sse2")
TARGET_BUILTIN(__builtin_ia32_movnti64, "vOi*Oi", "n", "sse2")
TARGET_BUILTIN(__builtin_ia32_vec_ext_v2di, "OiV2OiIi", "ncV:128:", "sse2")
TARGET_BUILTIN(__builtin_ia32_vec_set_v2di, "V2OiV2OiOiIi", "ncV:128:", "sse4.1")
TARGET_BUILTIN(__builtin_ia32_crc32di, "UOiUOiUOi", "nc", "crc32")
TARGET_BUILTIN(__builtin_ia32_vec_ext_v4di, "OiV4OiIi", "ncV:256:", "avx")

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@ -3284,13 +3284,13 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtsi32_si128(int __a) {
return __extension__(__m128i)(__v4si){__a, 0, 0, 0};
}
#ifdef __x86_64__
/// Returns a vector of [2 x i64] where the lower element is the input
/// operand and the upper element is zero.
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.
/// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction
/// in 64-bit mode.
///
/// \param __a
/// A 64-bit signed integer operand containing the value to be converted.
@ -3298,7 +3298,6 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtsi32_si128(int __a) {
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtsi64_si128(long long __a) {
return __extension__(__m128i)(__v2di){__a, 0};
}
#endif
/// Moves the least significant 32 bits of a vector of [4 x i32] to a
/// 32-bit signed integer value.
@ -3316,7 +3315,6 @@ static __inline__ int __DEFAULT_FN_ATTRS _mm_cvtsi128_si32(__m128i __a) {
return __b[0];
}
#ifdef __x86_64__
/// Moves the least significant 64 bits of a vector of [2 x i64] to a
/// 64-bit signed integer value.
///
@ -3331,7 +3329,6 @@ static __inline__ int __DEFAULT_FN_ATTRS _mm_cvtsi128_si32(__m128i __a) {
static __inline__ long long __DEFAULT_FN_ATTRS _mm_cvtsi128_si64(__m128i __a) {
return __a[0];
}
#endif
/// Moves packed integer values from an aligned 128-bit memory location
/// to elements in a 128-bit integer vector.

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@ -1054,7 +1054,6 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epu32(__m128i __V1,
#define _mm_extract_epi32(X, N) \
((int)__builtin_ia32_vec_ext_v4si((__v4si)(__m128i)(X), (int)(N)))
#ifdef __x86_64__
/// Extracts a 64-bit element from the 128-bit integer vector of
/// [2 x i64], using the immediate value parameter \a N as a selector.
///
@ -1064,7 +1063,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epu32(__m128i __V1,
/// long long _mm_extract_epi64(__m128i X, const int N);
/// \endcode
///
/// This intrinsic corresponds to the <c> VPEXTRQ / PEXTRQ </c> instruction.
/// This intrinsic corresponds to the <c> VPEXTRQ / PEXTRQ </c> instruction
/// in 64-bit mode.
///
/// \param X
/// A 128-bit integer vector.
@ -1076,7 +1076,6 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epu32(__m128i __V1,
/// \returns A 64-bit integer.
#define _mm_extract_epi64(X, N) \
((long long)__builtin_ia32_vec_ext_v2di((__v2di)(__m128i)(X), (int)(N)))
#endif /* __x86_64 */
/* SSE4 128-bit Packed Integer Comparisons. */
/// Tests whether the specified bits in a 128-bit integer vector are all

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@ -510,13 +510,11 @@ int test_mm_cvtsi128_si32(__m128i A) {
return _mm_cvtsi128_si32(A);
}
#ifdef __x86_64__
long long test_mm_cvtsi128_si64(__m128i A) {
// X64-LABEL: test_mm_cvtsi128_si64
// X64: extractelement <2 x i64> %{{.*}}, i32 0
// CHECK-LABEL: test_mm_cvtsi128_si64
// CHECK: extractelement <2 x i64> %{{.*}}, i32 0
return _mm_cvtsi128_si64(A);
}
#endif
__m128d test_mm_cvtsi32_sd(__m128d A, int B) {
// CHECK-LABEL: test_mm_cvtsi32_sd
@ -541,14 +539,14 @@ __m128d test_mm_cvtsi64_sd(__m128d A, long long B) {
// X64: insertelement <2 x double> %{{.*}}, double %{{.*}}, i32 0
return _mm_cvtsi64_sd(A, B);
}
#endif
__m128i test_mm_cvtsi64_si128(long long A) {
// X64-LABEL: test_mm_cvtsi64_si128
// X64: insertelement <2 x i64> undef, i64 %{{.*}}, i32 0
// X64: insertelement <2 x i64> %{{.*}}, i64 0, i32 1
// CHECK-LABEL: test_mm_cvtsi64_si128
// CHECK: insertelement <2 x i64> undef, i64 %{{.*}}, i32 0
// CHECK: insertelement <2 x i64> %{{.*}}, i64 0, i32 1
return _mm_cvtsi64_si128(A);
}
#endif
__m128d test_mm_cvtss_sd(__m128d A, __m128 B) {
// CHECK-LABEL: test_mm_cvtss_sd

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@ -184,13 +184,11 @@ int test_mm_extract_epi32(__m128i x) {
return _mm_extract_epi32(x, 1);
}
#ifdef __x86_64__
long long test_mm_extract_epi64(__m128i x) {
// X64-LABEL: test_mm_extract_epi64
// X64: extractelement <2 x i64> %{{.*}}, {{i32|i64}} 1
// CHECK-LABEL: test_mm_extract_epi64
// CHECK: extractelement <2 x i64> %{{.*}}, {{i32|i64}} 1
return _mm_extract_epi64(x, 1);
}
#endif
int test_mm_extract_ps(__m128 x) {
// CHECK-LABEL: test_mm_extract_ps