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[WebAssembly] Change std::sort to llvm::sort in response to r327219 

Summary:
r327219 added wrappers to std::sort which randomly shuffle the container before sorting.
This will help in uncovering non-determinism caused due to undefined sorting
order of objects having the same key.

To make use of that infrastructure we need to invoke llvm::sort instead of std::sort.

Note: This patch is one of a series of patches to replace *all* std::sort to llvm::sort.
Refer the comments section in D44363 for a list of all the required patches.

Reviewers: sunfish, RKSimon

Reviewed By: sunfish

Subscribers: jfb, dschuff, sbc100, jgravelle-google, aheejin, llvm-commits

Differential Revision: https://reviews.llvm.org/D44873

llvm-svn: 329607
This commit is contained in:
Mandeep Singh Grang 2018-04-09 19:38:31 +00:00
parent 09873b2bcf
commit afa3aaf14d
1 changed files with 10 additions and 10 deletions
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20
llvm/lib/Target/WebAssembly/WebAssemblyRegColoring.cpp
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@ -118,16 +118,16 @@ bool WebAssemblyRegColoring::runOnMachineFunction(MachineFunction &MF) {
// registers), by weight next, and then by position. // registers), by weight next, and then by position.
// TODO: Investigate more intelligent sorting heuristics. For starters, we // TODO: Investigate more intelligent sorting heuristics. For starters, we
// should try to coalesce adjacent live intervals before non-adjacent ones. // should try to coalesce adjacent live intervals before non-adjacent ones.
std::sort(SortedIntervals.begin(), SortedIntervals.end(), llvm::sort(SortedIntervals.begin(), SortedIntervals.end(),
[MRI](LiveInterval *LHS, LiveInterval *RHS) { [MRI](LiveInterval *LHS, LiveInterval *RHS) {
if (MRI->isLiveIn(LHS->reg) != MRI->isLiveIn(RHS->reg)) if (MRI->isLiveIn(LHS->reg) != MRI->isLiveIn(RHS->reg))
return MRI->isLiveIn(LHS->reg); return MRI->isLiveIn(LHS->reg);
if (LHS->weight != RHS->weight) if (LHS->weight != RHS->weight)
return LHS->weight > RHS->weight; return LHS->weight > RHS->weight;
if (LHS->empty() || RHS->empty()) if (LHS->empty() || RHS->empty())
return !LHS->empty() && RHS->empty(); return !LHS->empty() && RHS->empty();
return *LHS < *RHS; return *LHS < *RHS;
}); });
DEBUG(dbgs() << "Coloring register intervals:\n"); DEBUG(dbgs() << "Coloring register intervals:\n");
SmallVector<unsigned, 16> SlotMapping(SortedIntervals.size(), -1u); SmallVector<unsigned, 16> SlotMapping(SortedIntervals.size(), -1u);