forked from OSchip/llvm-project
[AVX512] Fix some places that used FR64 instead of FR64X.
llvm-svn: 256484
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@ -2846,17 +2846,17 @@ def VMOV64toPQIZrm : AVX512BI<0x6E, MRMSrcMem, (outs VR128X:$dst),
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"vmovq\t{$src, $dst|$dst, $src}", []>,
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EVEX, VEX_LIG, VEX_W, EVEX_CD8<64, CD8VT1>;
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let isCodeGenOnly = 1 in {
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def VMOV64toSDZrr : AVX512BI<0x6E, MRMSrcReg, (outs FR64:$dst), (ins GR64:$src),
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def VMOV64toSDZrr : AVX512BI<0x6E, MRMSrcReg, (outs FR64X:$dst), (ins GR64:$src),
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"vmovq\t{$src, $dst|$dst, $src}",
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[(set FR64:$dst, (bitconvert GR64:$src))],
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[(set FR64X:$dst, (bitconvert GR64:$src))],
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IIC_SSE_MOVDQ>, EVEX, VEX_W, Sched<[WriteMove]>;
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def VMOVSDto64Zrr : AVX512BI<0x7E, MRMDestReg, (outs GR64:$dst), (ins FR64:$src),
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def VMOVSDto64Zrr : AVX512BI<0x7E, MRMDestReg, (outs GR64:$dst), (ins FR64X:$src),
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"vmovq\t{$src, $dst|$dst, $src}",
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[(set GR64:$dst, (bitconvert FR64:$src))],
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[(set GR64:$dst, (bitconvert FR64X:$src))],
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IIC_SSE_MOVDQ>, EVEX, VEX_W, Sched<[WriteMove]>;
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def VMOVSDto64Zmr : AVX512BI<0x7E, MRMDestMem, (outs), (ins i64mem:$dst, FR64:$src),
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def VMOVSDto64Zmr : AVX512BI<0x7E, MRMDestMem, (outs), (ins i64mem:$dst, FR64X:$src),
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"vmovq\t{$src, $dst|$dst, $src}",
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[(store (i64 (bitconvert FR64:$src)), addr:$dst)],
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[(store (i64 (bitconvert FR64X:$src)), addr:$dst)],
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IIC_SSE_MOVDQ>, EVEX, VEX_W, Sched<[WriteStore]>,
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EVEX_CD8<64, CD8VT1>;
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}
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