forked from OSchip/llvm-project
[Hexagon] Skip reserved physical registers when updating liveness
llvm-svn: 331518
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@ -547,7 +547,14 @@ void HexagonExpandCondsets::removeInstr(MachineInstr &MI) {
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void HexagonExpandCondsets::updateLiveness(std::set<unsigned> &RegSet,
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void HexagonExpandCondsets::updateLiveness(std::set<unsigned> &RegSet,
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bool Recalc, bool UpdateKills, bool UpdateDeads) {
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bool Recalc, bool UpdateKills, bool UpdateDeads) {
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UpdateKills |= UpdateDeads;
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UpdateKills |= UpdateDeads;
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for (auto R : RegSet) {
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for (unsigned R : RegSet) {
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if (!TargetRegisterInfo::isVirtualRegister(R)) {
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assert(TargetRegisterInfo::isPhysicalRegister(R));
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// There shouldn't be any physical registers as operands, except
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// possibly reserved registers.
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assert(MRI->isReserved(R));
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continue;
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}
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if (Recalc)
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if (Recalc)
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recalculateLiveInterval(R);
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recalculateLiveInterval(R);
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if (UpdateKills)
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if (UpdateKills)
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@ -0,0 +1,30 @@
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# RUN: llc -march=hexagon -run-pass expand-condsets %s -o - | FileCheck %s
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# REQUIRES: asserts
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# The physical register as an operand to C2_mux caused a crash.
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# Check that this compiles successfully and that the mux is expanded.
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# CHECK: %2:intregs = A2_tfrt %1, $r31
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# CHECK: %2:intregs = A2_tfrf killed %1, killed %0, implicit %2(tied-def 0)
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name: fred
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tracksRegLiveness: true
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body: |
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bb.0:
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successors: %bb.1, %bb.2
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liveins: $r0
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%0:intregs = A2_tfrsi 0 ;; Multiple defs to ensure IsSSA = false
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%0:intregs = L2_loadri_io $r0, 0
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%1:predregs = C2_cmplt %0, 10
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%2:intregs = C2_mux %1, $r31, %0
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%3:predregs = C2_cmpeqi %2, 0
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J2_jumpt %3, %bb.1, implicit-def $pc
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J2_jump %bb.2, implicit-def $pc
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bb.1:
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PS_jmpret $r31, implicit-def $pc
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bb.2:
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PS_jmpret $r31, implicit-def $pc
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...
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