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[X86][PKU] Add {RD,WR}PKRU intrinsics 

Differential Revision: http://reviews.llvm.org/D15808

llvm-svn: 256670
This commit is contained in:
Asaf Badouh 2015-12-31 08:31:13 +00:00
parent fd2c6a3be0
commit af6569afd2
4 changed files with 82 additions and 5 deletions
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4
llvm/include/llvm/IR/IntrinsicsX86.td
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@ -3919,9 +3919,9 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
// Support protection key
let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
def int_x86_rdpkru : GCCBuiltin <"__builtin_ia32_rdpkru">,
Intrinsic<[llvm_i32_ty], [], [IntrNoMem]>;
Intrinsic<[llvm_i32_ty], [], []>;
def int_x86_wrpkru : GCCBuiltin<"__builtin_ia32_wrpkru">,
Intrinsic<[], [llvm_i32_ty], [IntrNoMem]>;
Intrinsic<[], [llvm_i32_ty], []>;
}
//===----------------------------------------------------------------------===//
// Half float conversion

47
llvm/lib/Target/X86/X86ISelLowering.cpp
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@ -21144,6 +21144,47 @@ static MachineBasicBlock *EmitPCMPSTRI(MachineInstr *MI, MachineBasicBlock *BB,
return BB;
}
static MachineBasicBlock *EmitWRPKRU(MachineInstr *MI, MachineBasicBlock *BB,
const X86Subtarget *Subtarget) {
DebugLoc dl = MI->getDebugLoc();
const TargetInstrInfo *TII = Subtarget->getInstrInfo();
// insert input VAL into EAX
BuildMI(*BB, MI, dl, TII->get(TargetOpcode::COPY), X86::EAX)
.addReg(MI->getOperand(0).getReg());
// insert zero to ECX
BuildMI(*BB, MI, dl, TII->get(X86::XOR32rr), X86::ECX)
.addReg(X86::ECX)
.addReg(X86::ECX);
// insert zero to EDX
BuildMI(*BB, MI, dl, TII->get(X86::XOR32rr), X86::EDX)
.addReg(X86::EDX)
.addReg(X86::EDX);
// insert WRPKRU instruction
BuildMI(*BB, MI, dl, TII->get(X86::WRPKRUr));
MI->eraseFromParent(); // The pseudo is gone now.
return BB;
}
static MachineBasicBlock *EmitRDPKRU(MachineInstr *MI, MachineBasicBlock *BB,
const X86Subtarget *Subtarget) {
DebugLoc dl = MI->getDebugLoc();
const TargetInstrInfo *TII = Subtarget->getInstrInfo();
// insert zero to ECX
BuildMI(*BB, MI, dl, TII->get(X86::XOR32rr), X86::ECX)
.addReg(X86::ECX)
.addReg(X86::ECX);
// insert RDPKRU instruction
BuildMI(*BB, MI, dl, TII->get(X86::RDPKRUr));
BuildMI(*BB, MI, dl, TII->get(TargetOpcode::COPY), MI->getOperand(0).getReg())
.addReg(X86::EAX);
MI->eraseFromParent(); // The pseudo is gone now.
return BB;
}
static MachineBasicBlock *EmitMonitor(MachineInstr *MI, MachineBasicBlock *BB,
const X86Subtarget *Subtarget) {
DebugLoc dl = MI->getDebugLoc();
@ -22611,7 +22652,11 @@ X86TargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI,
// Thread synchronization.
case X86::MONITOR:
return EmitMonitor(MI, BB, Subtarget);
// PKU feature
case X86::WRPKRU:
return EmitWRPKRU(MI, BB, Subtarget);
case X86::RDPKRU:
return EmitRDPKRU(MI, BB, Subtarget);
// xbegin
case X86::XBEGIN:
return EmitXBegin(MI, BB, Subtarget->getInstrInfo());

11
llvm/lib/Target/X86/X86InstrSystem.td
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@ -551,10 +551,17 @@ let Defs = [RAX, RDX, RSI], Uses = [RAX, RSI] in
def MONTMUL : I<0xa6, MRM_C0, (outs), (ins), "montmul", []>, TB;
//==-----------------------------------------------------------------------===//
// PKU - enable protection key
let usesCustomInserter = 1 in {
def WRPKRU : PseudoI<(outs), (ins GR32:$src),
[(int_x86_wrpkru GR32:$src)]>;
def RDPKRU : PseudoI<(outs GR32:$dst), (ins),
[(set GR32:$dst, (int_x86_rdpkru))]>;
}
let Defs = [EAX, EDX], Uses = [ECX] in
def RDPKRU : I<0x01, MRM_EE, (outs), (ins), "rdpkru", []>, TB;
def RDPKRUr : I<0x01, MRM_EE, (outs), (ins), "rdpkru", []>, TB;
let Uses = [EAX, ECX, EDX] in
def WRPKRU : I<0x01, MRM_EF, (outs), (ins), "wrpkru", []>, TB;
def WRPKRUr : I<0x01, MRM_EF, (outs), (ins), "wrpkru", []>, TB;
//===----------------------------------------------------------------------===//
// FS/GS Base Instructions

25
llvm/test/CodeGen/X86/pku.ll Normal file
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@ -0,0 +1,25 @@
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl --show-mc-encoding| FileCheck %s
declare i32 @llvm.x86.rdpkru()
declare void @llvm.x86.wrpkru(i32)
define void @test_x86_wrpkru(i32 %src) {
; CHECK-LABEL: test_x86_wrpkru:
; CHECK: ## BB#0:
; CHECK-NEXT: xorl %ecx, %ecx
; CHECK-NEXT: xorl %edx, %edx
; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: wrpkru
; CHECK-NEXT: retq
call void @llvm.x86.wrpkru(i32 %src)
ret void
}
define i32 @test_x86_rdpkru() {
; CHECK-LABEL: test_x86_rdpkru:
; CHECK: ## BB#0:
; CHECK-NEXT: xorl %ecx, %ecx
; CHECK-NEXT: rdpkru
; CHECK-NEXT: retq
%res = call i32 @llvm.x86.rdpkru()
ret i32 %res
}