forked from OSchip/llvm-project
AMDGPU: Undo sub x, c -> add x, -c canonicalization
This is worse if the original constant is an inline immediate. This should also be done for 64-bit adds, but requires fixing operand folding bugs first. llvm-svn: 293540
This commit is contained in:
Matt Arsenault
parent
8432161f1d
commit
af635240d5
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@ -295,6 +295,19 @@ class VGPRImm <dag frag> : PatLeaf<frag, [{
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return Limit < 10;
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}]>;
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def NegateImm : SDNodeXForm<imm, [{
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return CurDAG->getConstant(-N->getSExtValue(), SDLoc(N), MVT::i32);
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}]>;
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// TODO: When FP inline imm values work?
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def NegSubInlineConst32 : ImmLeaf<i32, [{
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return Imm < -16 && Imm >= -64;
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}], NegateImm>;
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def NegSubInlineConst16 : ImmLeaf<i16, [{
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return Imm < -16 && Imm >= -64;
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}], NegateImm>;
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//===----------------------------------------------------------------------===//
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// Custom Operands
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//===----------------------------------------------------------------------===//
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@ -1125,6 +1125,15 @@ def : SHA256MaPattern <V_BFI_B32, V_XOR_B32_e64>;
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def : IntMed3Pat<V_MED3_I32, smax, smax_oneuse, smin_oneuse>;
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def : IntMed3Pat<V_MED3_U32, umax, umax_oneuse, umin_oneuse>;
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// Undo sub x, c -> add x, -c canonicalization since c is more likely
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// an inline immediate than -c.
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// TODO: Also do for 64-bit.
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def : Pat<
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(add i32:$src0, (i32 NegSubInlineConst32:$src1)),
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(S_SUB_I32 $src0, NegSubInlineConst32:$src1)
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>;
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//============================================================================//
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// Assembler aliases
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//============================================================================//
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@ -494,6 +494,14 @@ def : Pat <
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(V_CNDMASK_B32_e64 (i32 0), (i32 -1), $src)
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>;
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// Undo sub x, c -> add x, -c canonicalization since c is more likely
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// an inline immediate than -c.
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// TODO: Also do for 64-bit.
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def : Pat<
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(add i16:$src0, (i16 NegSubInlineConst16:$src1)),
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(V_SUB_U16_e64 $src0, NegSubInlineConst16:$src1)
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>;
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} // End Predicates = [isVI]
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//===----------------------------------------------------------------------===//
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@ -37,7 +37,7 @@ define void @s_addk_i32_k1(i32 addrspace(1)* %out, i32 %b) {
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}
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; SI-LABEL: {{^}}s_addk_i32_k2:
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; SI: s_addk_i32 {{s[0-9]+}}, 0xffef{{$}}
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; SI: s_sub_i32 s{{[0-9]+}}, s{{[0-9]+}}, 17
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; SI: s_endpgm
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define void @s_addk_i32_k2(i32 addrspace(1)* %out, i32 %b) {
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%add = add i32 %b, -17
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@ -45,6 +45,15 @@ define void @s_addk_i32_k2(i32 addrspace(1)* %out, i32 %b) {
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ret void
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}
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; SI-LABEL: {{^}}s_addk_i32_k3:
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; SI: s_addk_i32 {{s[0-9]+}}, 0xffbf{{$}}
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; SI: s_endpgm
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define void @s_addk_i32_k3(i32 addrspace(1)* %out, i32 %b) {
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%add = add i32 %b, -65
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store i32 %add, i32 addrspace(1)* %out
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ret void
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}
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; SI-LABEL: {{^}}s_addk_v2i32_k0:
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; SI-DAG: s_addk_i32 {{s[0-9]+}}, 0x41
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; SI-DAG: s_addk_i32 {{s[0-9]+}}, 0x42
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@ -0,0 +1,186 @@
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; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=SI %s
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; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VI %s
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; Test that add/sub with a constant is swapped to sub/add with negated
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; constant to minimize code size.
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; GCN-LABEL: {{^}}v_test_i32_x_sub_64:
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; GCN: {{buffer|flat}}_load_dword [[X:v[0-9]+]]
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; GCN: v_subrev_i32_e32 v{{[0-9]+}}, vcc, 64, [[X]]
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define void @v_test_i32_x_sub_64(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%tid.ext = sext i32 %tid to i64
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%gep = getelementptr inbounds i32, i32 addrspace(1)* %in, i64 %tid.ext
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%gep.out = getelementptr inbounds i32, i32 addrspace(1)* %out, i64 %tid.ext
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%x = load i32, i32 addrspace(1)* %gep
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%result = sub i32 %x, 64
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store i32 %result, i32 addrspace(1)* %gep.out
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ret void
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}
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; GCN-LABEL: {{^}}v_test_i32_x_sub_64_multi_use:
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; GCN: {{buffer|flat}}_load_dword [[X:v[0-9]+]]
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; GCN: {{buffer|flat}}_load_dword [[Y:v[0-9]+]]
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; GCN-DAG: v_subrev_i32_e32 v{{[0-9]+}}, vcc, 64, [[X]]
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; GCN-DAG: v_subrev_i32_e32 v{{[0-9]+}}, vcc, 64, [[Y]]
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define void @v_test_i32_x_sub_64_multi_use(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%tid.ext = sext i32 %tid to i64
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%gep = getelementptr inbounds i32, i32 addrspace(1)* %in, i64 %tid.ext
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%gep.out = getelementptr inbounds i32, i32 addrspace(1)* %out, i64 %tid.ext
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%x = load volatile i32, i32 addrspace(1)* %gep
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%y = load volatile i32, i32 addrspace(1)* %gep
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%result0 = sub i32 %x, 64
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%result1 = sub i32 %y, 64
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store volatile i32 %result0, i32 addrspace(1)* %gep.out
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store volatile i32 %result1, i32 addrspace(1)* %gep.out
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ret void
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}
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; GCN-LABEL: {{^}}v_test_i32_64_sub_x:
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; GCN: {{buffer|flat}}_load_dword [[X:v[0-9]+]]
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; GCN: v_sub_i32_e32 v{{[0-9]+}}, vcc, 64, [[X]]
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define void @v_test_i32_64_sub_x(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%tid.ext = sext i32 %tid to i64
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%gep = getelementptr inbounds i32, i32 addrspace(1)* %in, i64 %tid.ext
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%gep.out = getelementptr inbounds i32, i32 addrspace(1)* %out, i64 %tid.ext
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%x = load i32, i32 addrspace(1)* %gep
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%result = sub i32 64, %x
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store i32 %result, i32 addrspace(1)* %gep.out
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ret void
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}
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; GCN-LABEL: {{^}}v_test_i32_x_sub_65:
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; GCN: {{buffer|flat}}_load_dword [[X:v[0-9]+]]
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; GCN: v_add_i32_e32 v{{[0-9]+}}, vcc, 0xffffffbf, [[X]]
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define void @v_test_i32_x_sub_65(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%tid.ext = sext i32 %tid to i64
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%gep = getelementptr inbounds i32, i32 addrspace(1)* %in, i64 %tid.ext
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%gep.out = getelementptr inbounds i32, i32 addrspace(1)* %out, i64 %tid.ext
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%x = load i32, i32 addrspace(1)* %gep
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%result = sub i32 %x, 65
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store i32 %result, i32 addrspace(1)* %gep.out
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ret void
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}
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; GCN-LABEL: {{^}}v_test_i32_65_sub_x:
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; GCN: {{buffer|flat}}_load_dword [[X:v[0-9]+]]
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; GCN: v_sub_i32_e32 v{{[0-9]+}}, vcc, 0x41, [[X]]
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define void @v_test_i32_65_sub_x(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%tid.ext = sext i32 %tid to i64
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%gep = getelementptr inbounds i32, i32 addrspace(1)* %in, i64 %tid.ext
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%gep.out = getelementptr inbounds i32, i32 addrspace(1)* %out, i64 %tid.ext
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%x = load i32, i32 addrspace(1)* %gep
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%result = sub i32 65, %x
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store i32 %result, i32 addrspace(1)* %gep.out
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ret void
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}
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; GCN-LABEL: {{^}}v_test_i32_x_sub_neg16:
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; GCN: {{buffer|flat}}_load_dword [[X:v[0-9]+]]
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; GCN: v_add_i32_e32 v{{[0-9]+}}, vcc, 16, [[X]]
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define void @v_test_i32_x_sub_neg16(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%tid.ext = sext i32 %tid to i64
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%gep = getelementptr inbounds i32, i32 addrspace(1)* %in, i64 %tid.ext
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%gep.out = getelementptr inbounds i32, i32 addrspace(1)* %out, i64 %tid.ext
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%x = load i32, i32 addrspace(1)* %gep
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%result = sub i32 %x, -16
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store i32 %result, i32 addrspace(1)* %gep.out
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ret void
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}
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; GCN-LABEL: {{^}}v_test_i32_neg16_sub_x:
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; GCN: {{buffer|flat}}_load_dword [[X:v[0-9]+]]
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; GCN: v_sub_i32_e32 v{{[0-9]+}}, vcc, -16, [[X]]
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define void @v_test_i32_neg16_sub_x(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%tid.ext = sext i32 %tid to i64
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%gep = getelementptr inbounds i32, i32 addrspace(1)* %in, i64 %tid.ext
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%gep.out = getelementptr inbounds i32, i32 addrspace(1)* %out, i64 %tid.ext
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%x = load i32, i32 addrspace(1)* %gep
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%result = sub i32 -16, %x
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store i32 %result, i32 addrspace(1)* %gep.out
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ret void
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}
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; GCN-LABEL: {{^}}v_test_i32_x_sub_neg17:
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; GCN: {{buffer|flat}}_load_dword [[X:v[0-9]+]]
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; GCN: v_add_i32_e32 v{{[0-9]+}}, vcc, 17, [[X]]
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define void @v_test_i32_x_sub_neg17(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%tid.ext = sext i32 %tid to i64
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%gep = getelementptr inbounds i32, i32 addrspace(1)* %in, i64 %tid.ext
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%gep.out = getelementptr inbounds i32, i32 addrspace(1)* %out, i64 %tid.ext
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%x = load i32, i32 addrspace(1)* %gep
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%result = sub i32 %x, -17
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store i32 %result, i32 addrspace(1)* %gep.out
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ret void
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}
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; GCN-LABEL: {{^}}v_test_i32_neg17_sub_x:
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; GCN: {{buffer|flat}}_load_dword [[X:v[0-9]+]]
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; GCN: v_sub_i32_e32 v{{[0-9]+}}, vcc, 0xffffffef, [[X]]
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define void @v_test_i32_neg17_sub_x(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%tid.ext = sext i32 %tid to i64
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%gep = getelementptr inbounds i32, i32 addrspace(1)* %in, i64 %tid.ext
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%gep.out = getelementptr inbounds i32, i32 addrspace(1)* %out, i64 %tid.ext
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%x = load i32, i32 addrspace(1)* %gep
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%result = sub i32 -17, %x
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store i32 %result, i32 addrspace(1)* %gep.out
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ret void
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}
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; GCN-LABEL: {{^}}s_test_i32_x_sub_64:
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; GCN: s_load_dword [[X:s[0-9]+]]
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; GCN: s_sub_i32 s{{[0-9]+}}, [[X]], 64
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define void @s_test_i32_x_sub_64(i32 %x) #0 {
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%result = sub i32 %x, 64
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call void asm sideeffect "; use $0", "s"(i32 %result)
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ret void
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}
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; GCN-LABEL: {{^}}v_test_i16_x_sub_64:
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; VI: {{buffer|flat}}_load_ushort [[X:v[0-9]+]]
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; VI: v_subrev_u16_e32 v{{[0-9]+}}, 64, [[X]]
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define void @v_test_i16_x_sub_64(i16 addrspace(1)* %out, i16 addrspace(1)* %in) #0 {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%tid.ext = sext i32 %tid to i64
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%gep = getelementptr inbounds i16, i16 addrspace(1)* %in, i64 %tid.ext
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%gep.out = getelementptr inbounds i16, i16 addrspace(1)* %out, i64 %tid.ext
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%x = load i16, i16 addrspace(1)* %gep
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%result = sub i16 %x, 64
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store i16 %result, i16 addrspace(1)* %gep.out
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ret void
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}
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; GCN-LABEL: {{^}}v_test_i16_x_sub_64_multi_use:
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; GCN: {{buffer|flat}}_load_ushort [[X:v[0-9]+]]
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; GCN: {{buffer|flat}}_load_ushort [[Y:v[0-9]+]]
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; VI-DAG: v_subrev_u16_e32 v{{[0-9]+}}, 64, [[X]]
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; VI-DAG: v_subrev_u16_e32 v{{[0-9]+}}, 64, [[Y]]
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; SI-DAG: v_subrev_i32_e32 v{{[0-9]+}}, vcc, 64, [[X]]
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; SI-DAG: v_subrev_i32_e32 v{{[0-9]+}}, vcc, 64, [[Y]]
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define void @v_test_i16_x_sub_64_multi_use(i16 addrspace(1)* %out, i16 addrspace(1)* %in) #0 {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%tid.ext = sext i32 %tid to i64
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%gep = getelementptr inbounds i16, i16 addrspace(1)* %in, i64 %tid.ext
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%gep.out = getelementptr inbounds i16, i16 addrspace(1)* %out, i64 %tid.ext
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%x = load volatile i16, i16 addrspace(1)* %gep
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%y = load volatile i16, i16 addrspace(1)* %gep
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%result0 = sub i16 %x, 64
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%result1 = sub i16 %y, 64
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store volatile i16 %result0, i16 addrspace(1)* %gep.out
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store volatile i16 %result1, i16 addrspace(1)* %gep.out
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ret void
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}
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declare i32 @llvm.amdgcn.workitem.id.x() #1
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attributes #0 = { nounwind }
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attributes #1 = { nounwind readnone }
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@ -52,7 +52,7 @@ define void @v_test_sub_i16_neg_constant(i16 addrspace(1)* %out, i16 addrspace(1
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; FIXME: Need to handle non-uniform case for function below (load without gep).
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; GCN-LABEL: {{^}}v_test_sub_i16_inline_63:
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; VI: flat_load_ushort [[A:v[0-9]+]]
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; VI: v_add_u16_e32 [[ADD:v[0-9]+]], 0xffffffc1, [[A]]
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; VI: v_subrev_u16_e32 [[ADD:v[0-9]+]], 63, [[A]]
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; VI-NEXT: buffer_store_short [[ADD]]
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define void @v_test_sub_i16_inline_63(i16 addrspace(1)* %out, i16 addrspace(1)* %in0) #1 {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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