forked from OSchip/llvm-project
mips64: clean up register context storage
Store the gpr data in a DataBufferHeap and use a DataExtractor to extract register values with appropriate endianness. This avoids hard- coding the register count, and with some further work would allow this class to provide generic register context storage for any CPU. llvm-svn: 205329
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@ -21,13 +21,9 @@ RegisterContextCorePOSIX_mips64::RegisterContextCorePOSIX_mips64(Thread &thread,
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const DataExtractor &fpregset)
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: RegisterContextPOSIX_mips64(thread, 0, register_info)
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{
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size_t i;
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lldb::offset_t offset = 0;
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for (i = 0; i < k_num_gpr_registers_mips64; i++)
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{
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m_reg[i] = gpregset.GetU64(&offset);
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}
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m_gpr_buffer.reset(new DataBufferHeap(gpregset.GetDataStart(), gpregset.GetByteSize()));
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m_gpr.SetData(m_gpr_buffer);
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m_gpr.SetByteOrder(gpregset.GetByteOrder());
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}
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RegisterContextCorePOSIX_mips64::~RegisterContextCorePOSIX_mips64()
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@ -63,10 +59,14 @@ RegisterContextCorePOSIX_mips64::WriteFPR()
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bool
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RegisterContextCorePOSIX_mips64::ReadRegister(const RegisterInfo *reg_info, RegisterValue &value)
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{
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int reg_num = reg_info->byte_offset / 8;
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assert(reg_num < k_num_gpr_registers_mips64);
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value = m_reg[reg_num];
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return true;
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lldb::offset_t offset = reg_info->byte_offset;
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uint64_t v = m_gpr.GetMaxU64(&offset, reg_info->byte_size);
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if (offset == reg_info->byte_offset + reg_info->byte_size)
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{
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value = v;
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return true;
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}
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return false;
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}
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bool
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@ -10,6 +10,7 @@
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#ifndef liblldb_RegisterContextCorePOSIX_mips64_H_
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#define liblldb_RegisterContextCorePOSIX_mips64_H_
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#include "lldb/Core/DataBufferHeap.h"
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#include "Plugins/Process/Utility/RegisterContextPOSIX_mips64.h"
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class RegisterContextCorePOSIX_mips64 :
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@ -52,7 +53,8 @@ protected:
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WriteFPR();
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private:
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uint64_t m_reg[40];
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lldb::DataBufferSP m_gpr_buffer;
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lldb_private::DataExtractor m_gpr;
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};
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#endif // #ifndef liblldb_RegisterContextCorePOSIX_mips64_H_
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