forked from OSchip/llvm-project
[X86] Fix a couple isel patterns to not shrink a volatile load.
Also add a FIXME because I'm not sure why these patterns exist. Looks like a missing combine. And another FIXME because the AVX512 equivalent one of the patterns is missing. llvm-svn: 370276
This commit is contained in:
parent
b39876d8cd
commit
af364131af
|
@ -5326,11 +5326,13 @@ let ExeDomain = SSEPackedSingle in {
|
|||
let Predicates = [UseAVX] in {
|
||||
// If we're inserting an element from a vbroadcast of a load, fold the
|
||||
// load into the X86insertps instruction.
|
||||
// FIXME: Why are these here? This looks like a demanded bits issue.
|
||||
// FIXME: Missing AVX512 equivalents.
|
||||
def : Pat<(v4f32 (X86insertps (v4f32 VR128:$src1),
|
||||
(X86VBroadcast (loadf32 addr:$src2)), imm:$src3)),
|
||||
(VINSERTPSrm VR128:$src1, addr:$src2, imm:$src3)>;
|
||||
def : Pat<(v4f32 (X86insertps (v4f32 VR128:$src1),
|
||||
(X86VBroadcast (loadv4f32 addr:$src2)), imm:$src3)),
|
||||
(X86VBroadcast (v4f32 (nonvolatile_load addr:$src2))), imm:$src3)),
|
||||
(VINSERTPSrm VR128:$src1, addr:$src2, imm:$src3)>;
|
||||
}
|
||||
|
||||
|
@ -7562,7 +7564,7 @@ let Predicates = [HasAVX, NoVLX] in {
|
|||
|
||||
def : Pat<(v2f64 (X86VBroadcast v2f64:$src)),
|
||||
(VMOVDDUPrr VR128:$src)>;
|
||||
def : Pat<(v2f64 (X86VBroadcast (loadv2f64 addr:$src))),
|
||||
def : Pat<(v2f64 (X86VBroadcast (v2f64 (nonvolatile_load addr:$src)))),
|
||||
(VMOVDDUPrm addr:$src)>;
|
||||
def : Pat<(v2f64 (X86VBroadcast (v2f64 (X86vzload64 addr:$src)))),
|
||||
(VMOVDDUPrm addr:$src)>;
|
||||
|
|
Loading…
Reference in New Issue