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@ -4928,17 +4928,21 @@ entry:
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; CHECK1-LABEL: define {{[^@]+}}@merge_seq_float
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; CHECK1-SAME: (float [[F:%.*]], float* nocapture nofree writeonly [[P:%.*]]) local_unnamed_addr {
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; CHECK1-NEXT: entry:
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; CHECK1-NEXT: [[STRUCTARG:%.*]] = alloca { float*, float* }, align 8
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; CHECK1-NEXT: [[STRUCTARG:%.*]] = alloca { float*, float*, float* }, align 8
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; CHECK1-NEXT: [[F_RELOADED:%.*]] = alloca float, align 4
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; CHECK1-NEXT: [[F_ADDR:%.*]] = alloca float, align 4
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; CHECK1-NEXT: store float [[F]], float* [[F_ADDR]], align 4
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; CHECK1-NEXT: [[OMP_GLOBAL_THREAD_NUM2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
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; CHECK1-NEXT: store float [[F]], float* [[F_RELOADED]], align 4
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; CHECK1-NEXT: br label [[OMP_PARALLEL:%.*]]
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; CHECK1: omp_parallel:
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; CHECK1-NEXT: [[GEP_F_ADDR:%.*]] = getelementptr { float*, float* }, { float*, float* }* [[STRUCTARG]], i32 0, i32 0
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; CHECK1-NEXT: [[GEP_F_RELOADED:%.*]] = getelementptr { float*, float*, float* }, { float*, float*, float* }* [[STRUCTARG]], i32 0, i32 0
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; CHECK1-NEXT: store float* [[F_RELOADED]], float** [[GEP_F_RELOADED]], align 8
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; CHECK1-NEXT: [[GEP_F_ADDR:%.*]] = getelementptr { float*, float*, float* }, { float*, float*, float* }* [[STRUCTARG]], i32 0, i32 1
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; CHECK1-NEXT: store float* [[F_ADDR]], float** [[GEP_F_ADDR]], align 8
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; CHECK1-NEXT: [[GEP_P:%.*]] = getelementptr { float*, float* }, { float*, float* }* [[STRUCTARG]], i32 0, i32 1
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; CHECK1-NEXT: [[GEP_P:%.*]] = getelementptr { float*, float*, float* }, { float*, float*, float* }* [[STRUCTARG]], i32 0, i32 2
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; CHECK1-NEXT: store float* [[P]], float** [[GEP_P]], align 8
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; CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, { float*, float* }*)* @merge_seq_float..omp_par to void (i32*, i32*, ...)*), { float*, float* }* [[STRUCTARG]])
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; CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, { float*, float*, float* }*)* @merge_seq_float..omp_par to void (i32*, i32*, ...)*), { float*, float*, float* }* [[STRUCTARG]])
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; CHECK1-NEXT: br label [[OMP_PAR_OUTLINED_EXIT:%.*]]
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; CHECK1: omp.par.outlined.exit:
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; CHECK1-NEXT: br label [[OMP_PAR_EXIT_SPLIT:%.*]]
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@ -4949,16 +4953,19 @@ entry:
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;
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;
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; CHECK1-LABEL: define {{[^@]+}}@merge_seq_float..omp_par
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; CHECK1-SAME: (i32* noalias [[TID_ADDR:%.*]], i32* noalias [[ZERO_ADDR:%.*]], { float*, float* }* [[TMP0:%.*]]) #[[ATTR0]] {
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; CHECK1-SAME: (i32* noalias [[TID_ADDR:%.*]], i32* noalias [[ZERO_ADDR:%.*]], { float*, float*, float* }* [[TMP0:%.*]]) #[[ATTR0]] {
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; CHECK1-NEXT: omp.par.entry:
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; CHECK1-NEXT: [[GEP_F_ADDR:%.*]] = getelementptr { float*, float* }, { float*, float* }* [[TMP0]], i32 0, i32 0
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; CHECK1-NEXT: [[GEP_F_RELOADED:%.*]] = getelementptr { float*, float*, float* }, { float*, float*, float* }* [[TMP0]], i32 0, i32 0
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; CHECK1-NEXT: [[LOADGEP_F_RELOADED:%.*]] = load float*, float** [[GEP_F_RELOADED]], align 8
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; CHECK1-NEXT: [[GEP_F_ADDR:%.*]] = getelementptr { float*, float*, float* }, { float*, float*, float* }* [[TMP0]], i32 0, i32 1
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; CHECK1-NEXT: [[LOADGEP_F_ADDR:%.*]] = load float*, float** [[GEP_F_ADDR]], align 8
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; CHECK1-NEXT: [[GEP_P:%.*]] = getelementptr { float*, float* }, { float*, float* }* [[TMP0]], i32 0, i32 1
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; CHECK1-NEXT: [[GEP_P:%.*]] = getelementptr { float*, float*, float* }, { float*, float*, float* }* [[TMP0]], i32 0, i32 2
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; CHECK1-NEXT: [[LOADGEP_P:%.*]] = load float*, float** [[GEP_P]], align 8
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; CHECK1-NEXT: [[TID_ADDR_LOCAL:%.*]] = alloca i32, align 4
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; CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TID_ADDR]], align 4
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; CHECK1-NEXT: store i32 [[TMP1]], i32* [[TID_ADDR_LOCAL]], align 4
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; CHECK1-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
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; CHECK1-NEXT: [[TMP2:%.*]] = load float, float* [[LOADGEP_F_RELOADED]], align 4
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; CHECK1-NEXT: br label [[OMP_PAR_REGION:%.*]]
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; CHECK1: omp.par.region:
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; CHECK1-NEXT: br label [[OMP_PAR_MERGED:%.*]]
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@ -4967,9 +4974,9 @@ entry:
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; CHECK1-NEXT: [[OMP_GLOBAL_THREAD_NUM2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
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; CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB3]], i32 [[OMP_GLOBAL_THREAD_NUM2]])
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; CHECK1-NEXT: [[OMP_GLOBAL_THREAD_NUM:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
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; CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB2]], i32 [[OMP_GLOBAL_THREAD_NUM]])
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; CHECK1-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
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; CHECK1-NEXT: br i1 [[TMP3]], label [[OMP_REGION_BODY:%.*]], label [[OMP_REGION_END:%.*]]
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; CHECK1-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB2]], i32 [[OMP_GLOBAL_THREAD_NUM]])
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; CHECK1-NEXT: [[TMP4:%.*]] = icmp ne i32 [[TMP3]], 0
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; CHECK1-NEXT: br i1 [[TMP4]], label [[OMP_REGION_BODY:%.*]], label [[OMP_REGION_END:%.*]]
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; CHECK1: omp_region.end:
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; CHECK1-NEXT: [[OMP_GLOBAL_THREAD_NUM1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
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; CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB3]], i32 [[OMP_GLOBAL_THREAD_NUM1]])
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@ -4986,8 +4993,7 @@ entry:
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; CHECK1: omp_region.body:
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; CHECK1-NEXT: br label [[SEQ_PAR_MERGED:%.*]]
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; CHECK1: seq.par.merged:
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; CHECK1-NEXT: [[TMP4:%.*]] = load float, float* [[LOADGEP_F_ADDR]], align 4
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; CHECK1-NEXT: [[ADD:%.*]] = fadd float [[TMP4]], 0x40091EB860000000
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; CHECK1-NEXT: [[ADD:%.*]] = fadd float [[TMP2]], 0x40091EB860000000
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; CHECK1-NEXT: store float [[ADD]], float* [[LOADGEP_P]], align 4
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; CHECK1-NEXT: br label [[OMP_PAR_MERGED_SPLIT:%.*]]
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; CHECK1: omp.par.merged.split:
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@ -5206,20 +5212,24 @@ entry:
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; CHECK1-LABEL: define {{[^@]+}}@merge_seq_par_use
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; CHECK1-SAME: (i32 [[A:%.*]]) local_unnamed_addr {
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; CHECK1-NEXT: entry:
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; CHECK1-NEXT: [[STRUCTARG:%.*]] = alloca { i32*, i32* }, align 8
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; CHECK1-NEXT: [[STRUCTARG:%.*]] = alloca { i32*, i32*, i32* }, align 8
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; CHECK1-NEXT: [[A_RELOADED:%.*]] = alloca i32, align 4
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; CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
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; CHECK1-NEXT: [[B:%.*]] = alloca i32, align 4
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; CHECK1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
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; CHECK1-NEXT: [[OMP_GLOBAL_THREAD_NUM2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
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; CHECK1-NEXT: store i32 [[A]], i32* [[A_RELOADED]], align 4
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; CHECK1-NEXT: br label [[OMP_PARALLEL:%.*]]
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; CHECK1: omp_parallel:
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; CHECK1-NEXT: [[GEP_A_ADDR:%.*]] = getelementptr { i32*, i32* }, { i32*, i32* }* [[STRUCTARG]], i32 0, i32 0
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; CHECK1-NEXT: [[GEP_A_RELOADED:%.*]] = getelementptr { i32*, i32*, i32* }, { i32*, i32*, i32* }* [[STRUCTARG]], i32 0, i32 0
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; CHECK1-NEXT: store i32* [[A_RELOADED]], i32** [[GEP_A_RELOADED]], align 8
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; CHECK1-NEXT: [[GEP_A_ADDR:%.*]] = getelementptr { i32*, i32*, i32* }, { i32*, i32*, i32* }* [[STRUCTARG]], i32 0, i32 1
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; CHECK1-NEXT: store i32* [[A_ADDR]], i32** [[GEP_A_ADDR]], align 8
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; CHECK1-NEXT: [[GEP_B:%.*]] = getelementptr { i32*, i32* }, { i32*, i32* }* [[STRUCTARG]], i32 0, i32 1
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; CHECK1-NEXT: [[GEP_B:%.*]] = getelementptr { i32*, i32*, i32* }, { i32*, i32*, i32* }* [[STRUCTARG]], i32 0, i32 2
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; CHECK1-NEXT: store i32* [[B]], i32** [[GEP_B]], align 8
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; CHECK1-NEXT: [[LT_CAST3:%.*]] = bitcast i32* [[B]] to i8*
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; CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 -1, i8* [[LT_CAST3]])
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; CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, { i32*, i32* }*)* @merge_seq_par_use..omp_par to void (i32*, i32*, ...)*), { i32*, i32* }* [[STRUCTARG]])
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; CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, { i32*, i32*, i32* }*)* @merge_seq_par_use..omp_par to void (i32*, i32*, ...)*), { i32*, i32*, i32* }* [[STRUCTARG]])
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; CHECK1-NEXT: br label [[OMP_PAR_OUTLINED_EXIT:%.*]]
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; CHECK1: omp.par.outlined.exit:
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; CHECK1-NEXT: br label [[OMP_PAR_EXIT_SPLIT:%.*]]
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@ -5232,16 +5242,19 @@ entry:
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;
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;
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; CHECK1-LABEL: define {{[^@]+}}@merge_seq_par_use..omp_par
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; CHECK1-SAME: (i32* noalias [[TID_ADDR:%.*]], i32* noalias [[ZERO_ADDR:%.*]], { i32*, i32* }* [[TMP0:%.*]]) #[[ATTR0]] {
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; CHECK1-SAME: (i32* noalias [[TID_ADDR:%.*]], i32* noalias [[ZERO_ADDR:%.*]], { i32*, i32*, i32* }* [[TMP0:%.*]]) #[[ATTR0]] {
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; CHECK1-NEXT: omp.par.entry:
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; CHECK1-NEXT: [[GEP_A_ADDR:%.*]] = getelementptr { i32*, i32* }, { i32*, i32* }* [[TMP0]], i32 0, i32 0
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; CHECK1-NEXT: [[GEP_A_RELOADED:%.*]] = getelementptr { i32*, i32*, i32* }, { i32*, i32*, i32* }* [[TMP0]], i32 0, i32 0
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; CHECK1-NEXT: [[LOADGEP_A_RELOADED:%.*]] = load i32*, i32** [[GEP_A_RELOADED]], align 8
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; CHECK1-NEXT: [[GEP_A_ADDR:%.*]] = getelementptr { i32*, i32*, i32* }, { i32*, i32*, i32* }* [[TMP0]], i32 0, i32 1
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; CHECK1-NEXT: [[LOADGEP_A_ADDR:%.*]] = load i32*, i32** [[GEP_A_ADDR]], align 8
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; CHECK1-NEXT: [[GEP_B:%.*]] = getelementptr { i32*, i32* }, { i32*, i32* }* [[TMP0]], i32 0, i32 1
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; CHECK1-NEXT: [[GEP_B:%.*]] = getelementptr { i32*, i32*, i32* }, { i32*, i32*, i32* }* [[TMP0]], i32 0, i32 2
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; CHECK1-NEXT: [[LOADGEP_B:%.*]] = load i32*, i32** [[GEP_B]], align 8
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; CHECK1-NEXT: [[TID_ADDR_LOCAL:%.*]] = alloca i32, align 4
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; CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TID_ADDR]], align 4
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; CHECK1-NEXT: store i32 [[TMP1]], i32* [[TID_ADDR_LOCAL]], align 4
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; CHECK1-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
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; CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[LOADGEP_A_RELOADED]], align 4
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; CHECK1-NEXT: br label [[OMP_PAR_REGION:%.*]]
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; CHECK1: omp.par.region:
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; CHECK1-NEXT: br label [[OMP_PAR_MERGED:%.*]]
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@ -5250,9 +5263,9 @@ entry:
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; CHECK1-NEXT: [[OMP_GLOBAL_THREAD_NUM2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
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; CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB3]], i32 [[OMP_GLOBAL_THREAD_NUM2]])
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; CHECK1-NEXT: [[OMP_GLOBAL_THREAD_NUM:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
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; CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB2]], i32 [[OMP_GLOBAL_THREAD_NUM]])
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; CHECK1-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
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; CHECK1-NEXT: br i1 [[TMP3]], label [[OMP_REGION_BODY:%.*]], label [[OMP_REGION_END:%.*]]
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; CHECK1-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB2]], i32 [[OMP_GLOBAL_THREAD_NUM]])
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; CHECK1-NEXT: [[TMP4:%.*]] = icmp ne i32 [[TMP3]], 0
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; CHECK1-NEXT: br i1 [[TMP4]], label [[OMP_REGION_BODY:%.*]], label [[OMP_REGION_END:%.*]]
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; CHECK1: omp_region.end:
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; CHECK1-NEXT: [[OMP_GLOBAL_THREAD_NUM1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
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; CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB3]], i32 [[OMP_GLOBAL_THREAD_NUM1]])
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@ -5269,9 +5282,8 @@ entry:
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; CHECK1: omp_region.body:
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; CHECK1-NEXT: br label [[SEQ_PAR_MERGED:%.*]]
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; CHECK1: seq.par.merged:
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; CHECK1-NEXT: [[TMP4:%.*]] = bitcast i32* [[LOADGEP_B]] to i8*
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; CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[LOADGEP_A_ADDR]], align 4
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; CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP5]], 1
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; CHECK1-NEXT: [[TMP5:%.*]] = bitcast i32* [[LOADGEP_B]] to i8*
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; CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], 1
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; CHECK1-NEXT: store i32 [[ADD]], i32* [[LOADGEP_B]], align 4
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; CHECK1-NEXT: br label [[OMP_PAR_MERGED_SPLIT:%.*]]
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; CHECK1: omp.par.merged.split:
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@ -5387,19 +5399,23 @@ entry:
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; CHECK1-LABEL: define {{[^@]+}}@merge_cancellable_regions_seq
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; CHECK1-SAME: (i32 [[CANCEL1:%.*]], i32 [[CANCEL2:%.*]]) local_unnamed_addr {
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; CHECK1-NEXT: entry:
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; CHECK1-NEXT: [[STRUCTARG:%.*]] = alloca { i32*, i32* }, align 8
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; CHECK1-NEXT: [[STRUCTARG:%.*]] = alloca { i32*, i32*, i32* }, align 8
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; CHECK1-NEXT: [[CANCEL1_RELOADED:%.*]] = alloca i32, align 4
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; CHECK1-NEXT: [[CANCEL1_ADDR:%.*]] = alloca i32, align 4
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; CHECK1-NEXT: [[CANCEL2_ADDR:%.*]] = alloca i32, align 4
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; CHECK1-NEXT: store i32 [[CANCEL1]], i32* [[CANCEL1_ADDR]], align 4
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; CHECK1-NEXT: store i32 [[CANCEL2]], i32* [[CANCEL2_ADDR]], align 4
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; CHECK1-NEXT: [[OMP_GLOBAL_THREAD_NUM2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
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; CHECK1-NEXT: store i32 [[CANCEL1]], i32* [[CANCEL1_RELOADED]], align 4
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; CHECK1-NEXT: br label [[OMP_PARALLEL:%.*]]
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; CHECK1: omp_parallel:
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; CHECK1-NEXT: [[GEP_CANCEL1_ADDR:%.*]] = getelementptr { i32*, i32* }, { i32*, i32* }* [[STRUCTARG]], i32 0, i32 0
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; CHECK1-NEXT: [[GEP_CANCEL1_RELOADED:%.*]] = getelementptr { i32*, i32*, i32* }, { i32*, i32*, i32* }* [[STRUCTARG]], i32 0, i32 0
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; CHECK1-NEXT: store i32* [[CANCEL1_RELOADED]], i32** [[GEP_CANCEL1_RELOADED]], align 8
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; CHECK1-NEXT: [[GEP_CANCEL1_ADDR:%.*]] = getelementptr { i32*, i32*, i32* }, { i32*, i32*, i32* }* [[STRUCTARG]], i32 0, i32 1
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; CHECK1-NEXT: store i32* [[CANCEL1_ADDR]], i32** [[GEP_CANCEL1_ADDR]], align 8
|
|
|
|
|
; CHECK1-NEXT: [[GEP_CANCEL2_ADDR:%.*]] = getelementptr { i32*, i32* }, { i32*, i32* }* [[STRUCTARG]], i32 0, i32 1
|
|
|
|
|
; CHECK1-NEXT: [[GEP_CANCEL2_ADDR:%.*]] = getelementptr { i32*, i32*, i32* }, { i32*, i32*, i32* }* [[STRUCTARG]], i32 0, i32 2
|
|
|
|
|
; CHECK1-NEXT: store i32* [[CANCEL2_ADDR]], i32** [[GEP_CANCEL2_ADDR]], align 8
|
|
|
|
|
; CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, { i32*, i32* }*)* @merge_cancellable_regions_seq..omp_par to void (i32*, i32*, ...)*), { i32*, i32* }* [[STRUCTARG]])
|
|
|
|
|
; CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, { i32*, i32*, i32* }*)* @merge_cancellable_regions_seq..omp_par to void (i32*, i32*, ...)*), { i32*, i32*, i32* }* [[STRUCTARG]])
|
|
|
|
|
; CHECK1-NEXT: br label [[OMP_PAR_OUTLINED_EXIT:%.*]]
|
|
|
|
|
; CHECK1: omp.par.outlined.exit:
|
|
|
|
|
; CHECK1-NEXT: br label [[OMP_PAR_EXIT_SPLIT:%.*]]
|
|
|
|
@ -5410,16 +5426,19 @@ entry:
|
|
|
|
|
;
|
|
|
|
|
;
|
|
|
|
|
; CHECK1-LABEL: define {{[^@]+}}@merge_cancellable_regions_seq..omp_par
|
|
|
|
|
; CHECK1-SAME: (i32* noalias [[TID_ADDR:%.*]], i32* noalias [[ZERO_ADDR:%.*]], { i32*, i32* }* [[TMP0:%.*]]) #[[ATTR0]] {
|
|
|
|
|
; CHECK1-SAME: (i32* noalias [[TID_ADDR:%.*]], i32* noalias [[ZERO_ADDR:%.*]], { i32*, i32*, i32* }* [[TMP0:%.*]]) #[[ATTR0]] {
|
|
|
|
|
; CHECK1-NEXT: omp.par.entry:
|
|
|
|
|
; CHECK1-NEXT: [[GEP_CANCEL1_ADDR:%.*]] = getelementptr { i32*, i32* }, { i32*, i32* }* [[TMP0]], i32 0, i32 0
|
|
|
|
|
; CHECK1-NEXT: [[GEP_CANCEL1_RELOADED:%.*]] = getelementptr { i32*, i32*, i32* }, { i32*, i32*, i32* }* [[TMP0]], i32 0, i32 0
|
|
|
|
|
; CHECK1-NEXT: [[LOADGEP_CANCEL1_RELOADED:%.*]] = load i32*, i32** [[GEP_CANCEL1_RELOADED]], align 8
|
|
|
|
|
; CHECK1-NEXT: [[GEP_CANCEL1_ADDR:%.*]] = getelementptr { i32*, i32*, i32* }, { i32*, i32*, i32* }* [[TMP0]], i32 0, i32 1
|
|
|
|
|
; CHECK1-NEXT: [[LOADGEP_CANCEL1_ADDR:%.*]] = load i32*, i32** [[GEP_CANCEL1_ADDR]], align 8
|
|
|
|
|
; CHECK1-NEXT: [[GEP_CANCEL2_ADDR:%.*]] = getelementptr { i32*, i32* }, { i32*, i32* }* [[TMP0]], i32 0, i32 1
|
|
|
|
|
; CHECK1-NEXT: [[GEP_CANCEL2_ADDR:%.*]] = getelementptr { i32*, i32*, i32* }, { i32*, i32*, i32* }* [[TMP0]], i32 0, i32 2
|
|
|
|
|
; CHECK1-NEXT: [[LOADGEP_CANCEL2_ADDR:%.*]] = load i32*, i32** [[GEP_CANCEL2_ADDR]], align 8
|
|
|
|
|
; CHECK1-NEXT: [[TID_ADDR_LOCAL:%.*]] = alloca i32, align 4
|
|
|
|
|
; CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TID_ADDR]], align 4
|
|
|
|
|
; CHECK1-NEXT: store i32 [[TMP1]], i32* [[TID_ADDR_LOCAL]], align 4
|
|
|
|
|
; CHECK1-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
|
|
|
|
|
; CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[LOADGEP_CANCEL1_RELOADED]], align 4
|
|
|
|
|
; CHECK1-NEXT: br label [[OMP_PAR_REGION:%.*]]
|
|
|
|
|
; CHECK1: omp.par.region:
|
|
|
|
|
; CHECK1-NEXT: br label [[OMP_PAR_MERGED:%.*]]
|
|
|
|
@ -5428,9 +5447,9 @@ entry:
|
|
|
|
|
; CHECK1-NEXT: [[OMP_GLOBAL_THREAD_NUM2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
|
|
|
|
|
; CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB3]], i32 [[OMP_GLOBAL_THREAD_NUM2]])
|
|
|
|
|
; CHECK1-NEXT: [[OMP_GLOBAL_THREAD_NUM:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
|
|
|
|
|
; CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB2]], i32 [[OMP_GLOBAL_THREAD_NUM]])
|
|
|
|
|
; CHECK1-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
|
|
|
|
|
; CHECK1-NEXT: br i1 [[TMP3]], label [[OMP_REGION_BODY:%.*]], label [[OMP_REGION_END:%.*]]
|
|
|
|
|
; CHECK1-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB2]], i32 [[OMP_GLOBAL_THREAD_NUM]])
|
|
|
|
|
; CHECK1-NEXT: [[TMP4:%.*]] = icmp ne i32 [[TMP3]], 0
|
|
|
|
|
; CHECK1-NEXT: br i1 [[TMP4]], label [[OMP_REGION_BODY:%.*]], label [[OMP_REGION_END:%.*]]
|
|
|
|
|
; CHECK1: omp_region.end:
|
|
|
|
|
; CHECK1-NEXT: [[OMP_GLOBAL_THREAD_NUM1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
|
|
|
|
|
; CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB3]], i32 [[OMP_GLOBAL_THREAD_NUM1]])
|
|
|
|
@ -5447,8 +5466,7 @@ entry:
|
|
|
|
|
; CHECK1: omp_region.body:
|
|
|
|
|
; CHECK1-NEXT: br label [[SEQ_PAR_MERGED:%.*]]
|
|
|
|
|
; CHECK1: seq.par.merged:
|
|
|
|
|
; CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[LOADGEP_CANCEL1_ADDR]], align 4
|
|
|
|
|
; CHECK1-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[TMP4]], 0
|
|
|
|
|
; CHECK1-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[TMP2]], 0
|
|
|
|
|
; CHECK1-NEXT: [[LNOT_EXT:%.*]] = zext i1 [[TOBOOL_NOT]] to i32
|
|
|
|
|
; CHECK1-NEXT: store i32 [[LNOT_EXT]], i32* [[LOADGEP_CANCEL2_ADDR]], align 4
|
|
|
|
|
; CHECK1-NEXT: br label [[OMP_PAR_MERGED_SPLIT:%.*]]
|
|
|
|
@ -5568,21 +5586,25 @@ entry:
|
|
|
|
|
; CHECK1-LABEL: define {{[^@]+}}@merge_3_seq
|
|
|
|
|
; CHECK1-SAME: (i32 [[A:%.*]], i32 [[B:%.*]]) local_unnamed_addr {
|
|
|
|
|
; CHECK1-NEXT: entry:
|
|
|
|
|
; CHECK1-NEXT: [[STRUCTARG:%.*]] = alloca { i32*, i32*, i32* }, align 8
|
|
|
|
|
; CHECK1-NEXT: [[STRUCTARG:%.*]] = alloca { i32*, i32*, i32*, i32* }, align 8
|
|
|
|
|
; CHECK1-NEXT: [[A_RELOADED:%.*]] = alloca i32, align 4
|
|
|
|
|
; CHECK1-NEXT: [[ADD1_SEQ_OUTPUT_ALLOC:%.*]] = alloca i32, align 4
|
|
|
|
|
; CHECK1-NEXT: [[ADD_SEQ_OUTPUT_ALLOC:%.*]] = alloca i32, align 4
|
|
|
|
|
; CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
|
|
|
|
|
; CHECK1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
|
|
|
|
|
; CHECK1-NEXT: [[OMP_GLOBAL_THREAD_NUM7:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
|
|
|
|
|
; CHECK1-NEXT: store i32 [[A]], i32* [[A_RELOADED]], align 4
|
|
|
|
|
; CHECK1-NEXT: br label [[OMP_PARALLEL:%.*]]
|
|
|
|
|
; CHECK1: omp_parallel:
|
|
|
|
|
; CHECK1-NEXT: [[GEP_A_ADDR:%.*]] = getelementptr { i32*, i32*, i32* }, { i32*, i32*, i32* }* [[STRUCTARG]], i32 0, i32 0
|
|
|
|
|
; CHECK1-NEXT: [[GEP_A_RELOADED:%.*]] = getelementptr { i32*, i32*, i32*, i32* }, { i32*, i32*, i32*, i32* }* [[STRUCTARG]], i32 0, i32 0
|
|
|
|
|
; CHECK1-NEXT: store i32* [[A_RELOADED]], i32** [[GEP_A_RELOADED]], align 8
|
|
|
|
|
; CHECK1-NEXT: [[GEP_A_ADDR:%.*]] = getelementptr { i32*, i32*, i32*, i32* }, { i32*, i32*, i32*, i32* }* [[STRUCTARG]], i32 0, i32 1
|
|
|
|
|
; CHECK1-NEXT: store i32* [[A_ADDR]], i32** [[GEP_A_ADDR]], align 8
|
|
|
|
|
; CHECK1-NEXT: [[GEP_ADD_SEQ_OUTPUT_ALLOC:%.*]] = getelementptr { i32*, i32*, i32* }, { i32*, i32*, i32* }* [[STRUCTARG]], i32 0, i32 1
|
|
|
|
|
; CHECK1-NEXT: [[GEP_ADD_SEQ_OUTPUT_ALLOC:%.*]] = getelementptr { i32*, i32*, i32*, i32* }, { i32*, i32*, i32*, i32* }* [[STRUCTARG]], i32 0, i32 2
|
|
|
|
|
; CHECK1-NEXT: store i32* [[ADD_SEQ_OUTPUT_ALLOC]], i32** [[GEP_ADD_SEQ_OUTPUT_ALLOC]], align 8
|
|
|
|
|
; CHECK1-NEXT: [[GEP_ADD1_SEQ_OUTPUT_ALLOC:%.*]] = getelementptr { i32*, i32*, i32* }, { i32*, i32*, i32* }* [[STRUCTARG]], i32 0, i32 2
|
|
|
|
|
; CHECK1-NEXT: [[GEP_ADD1_SEQ_OUTPUT_ALLOC:%.*]] = getelementptr { i32*, i32*, i32*, i32* }, { i32*, i32*, i32*, i32* }* [[STRUCTARG]], i32 0, i32 3
|
|
|
|
|
; CHECK1-NEXT: store i32* [[ADD1_SEQ_OUTPUT_ALLOC]], i32** [[GEP_ADD1_SEQ_OUTPUT_ALLOC]], align 8
|
|
|
|
|
; CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, { i32*, i32*, i32* }*)* @merge_3_seq..omp_par to void (i32*, i32*, ...)*), { i32*, i32*, i32* }* [[STRUCTARG]])
|
|
|
|
|
; CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, { i32*, i32*, i32*, i32* }*)* @merge_3_seq..omp_par to void (i32*, i32*, ...)*), { i32*, i32*, i32*, i32* }* [[STRUCTARG]])
|
|
|
|
|
; CHECK1-NEXT: br label [[OMP_PAR_OUTLINED_EXIT:%.*]]
|
|
|
|
|
; CHECK1: omp.par.outlined.exit:
|
|
|
|
|
; CHECK1-NEXT: br label [[OMP_PAR_EXIT_SPLIT:%.*]]
|
|
|
|
@ -5595,18 +5617,21 @@ entry:
|
|
|
|
|
;
|
|
|
|
|
;
|
|
|
|
|
; CHECK1-LABEL: define {{[^@]+}}@merge_3_seq..omp_par
|
|
|
|
|
; CHECK1-SAME: (i32* noalias [[TID_ADDR:%.*]], i32* noalias [[ZERO_ADDR:%.*]], { i32*, i32*, i32* }* [[TMP0:%.*]]) #[[ATTR0]] {
|
|
|
|
|
; CHECK1-SAME: (i32* noalias [[TID_ADDR:%.*]], i32* noalias [[ZERO_ADDR:%.*]], { i32*, i32*, i32*, i32* }* [[TMP0:%.*]]) #[[ATTR0]] {
|
|
|
|
|
; CHECK1-NEXT: omp.par.entry:
|
|
|
|
|
; CHECK1-NEXT: [[GEP_A_ADDR:%.*]] = getelementptr { i32*, i32*, i32* }, { i32*, i32*, i32* }* [[TMP0]], i32 0, i32 0
|
|
|
|
|
; CHECK1-NEXT: [[GEP_A_RELOADED:%.*]] = getelementptr { i32*, i32*, i32*, i32* }, { i32*, i32*, i32*, i32* }* [[TMP0]], i32 0, i32 0
|
|
|
|
|
; CHECK1-NEXT: [[LOADGEP_A_RELOADED:%.*]] = load i32*, i32** [[GEP_A_RELOADED]], align 8
|
|
|
|
|
; CHECK1-NEXT: [[GEP_A_ADDR:%.*]] = getelementptr { i32*, i32*, i32*, i32* }, { i32*, i32*, i32*, i32* }* [[TMP0]], i32 0, i32 1
|
|
|
|
|
; CHECK1-NEXT: [[LOADGEP_A_ADDR:%.*]] = load i32*, i32** [[GEP_A_ADDR]], align 8
|
|
|
|
|
; CHECK1-NEXT: [[GEP_ADD_SEQ_OUTPUT_ALLOC:%.*]] = getelementptr { i32*, i32*, i32* }, { i32*, i32*, i32* }* [[TMP0]], i32 0, i32 1
|
|
|
|
|
; CHECK1-NEXT: [[GEP_ADD_SEQ_OUTPUT_ALLOC:%.*]] = getelementptr { i32*, i32*, i32*, i32* }, { i32*, i32*, i32*, i32* }* [[TMP0]], i32 0, i32 2
|
|
|
|
|
; CHECK1-NEXT: [[LOADGEP_ADD_SEQ_OUTPUT_ALLOC:%.*]] = load i32*, i32** [[GEP_ADD_SEQ_OUTPUT_ALLOC]], align 8
|
|
|
|
|
; CHECK1-NEXT: [[GEP_ADD1_SEQ_OUTPUT_ALLOC:%.*]] = getelementptr { i32*, i32*, i32* }, { i32*, i32*, i32* }* [[TMP0]], i32 0, i32 2
|
|
|
|
|
; CHECK1-NEXT: [[GEP_ADD1_SEQ_OUTPUT_ALLOC:%.*]] = getelementptr { i32*, i32*, i32*, i32* }, { i32*, i32*, i32*, i32* }* [[TMP0]], i32 0, i32 3
|
|
|
|
|
; CHECK1-NEXT: [[LOADGEP_ADD1_SEQ_OUTPUT_ALLOC:%.*]] = load i32*, i32** [[GEP_ADD1_SEQ_OUTPUT_ALLOC]], align 8
|
|
|
|
|
; CHECK1-NEXT: [[TID_ADDR_LOCAL:%.*]] = alloca i32, align 4
|
|
|
|
|
; CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TID_ADDR]], align 4
|
|
|
|
|
; CHECK1-NEXT: store i32 [[TMP1]], i32* [[TID_ADDR_LOCAL]], align 4
|
|
|
|
|
; CHECK1-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
|
|
|
|
|
; CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[LOADGEP_A_RELOADED]], align 4
|
|
|
|
|
; CHECK1-NEXT: br label [[OMP_PAR_REGION:%.*]]
|
|
|
|
|
; CHECK1: omp.par.region:
|
|
|
|
|
; CHECK1-NEXT: br label [[OMP_PAR_MERGED:%.*]]
|
|
|
|
@ -5615,9 +5640,9 @@ entry:
|
|
|
|
|
; CHECK1-NEXT: [[OMP_GLOBAL_THREAD_NUM2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
|
|
|
|
|
; CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB3]], i32 [[OMP_GLOBAL_THREAD_NUM2]])
|
|
|
|
|
; CHECK1-NEXT: [[OMP_GLOBAL_THREAD_NUM:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
|
|
|
|
|
; CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB2]], i32 [[OMP_GLOBAL_THREAD_NUM]])
|
|
|
|
|
; CHECK1-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
|
|
|
|
|
; CHECK1-NEXT: br i1 [[TMP3]], label [[OMP_REGION_BODY:%.*]], label [[OMP_REGION_END:%.*]]
|
|
|
|
|
; CHECK1-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB2]], i32 [[OMP_GLOBAL_THREAD_NUM]])
|
|
|
|
|
; CHECK1-NEXT: [[TMP4:%.*]] = icmp ne i32 [[TMP3]], 0
|
|
|
|
|
; CHECK1-NEXT: br i1 [[TMP4]], label [[OMP_REGION_BODY:%.*]], label [[OMP_REGION_END:%.*]]
|
|
|
|
|
; CHECK1: omp_region.end:
|
|
|
|
|
; CHECK1-NEXT: [[OMP_GLOBAL_THREAD_NUM1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
|
|
|
|
|
; CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB3]], i32 [[OMP_GLOBAL_THREAD_NUM1]])
|
|
|
|
@ -5627,9 +5652,9 @@ entry:
|
|
|
|
|
; CHECK1-NEXT: [[OMP_GLOBAL_THREAD_NUM4:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
|
|
|
|
|
; CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB3]], i32 [[OMP_GLOBAL_THREAD_NUM4]])
|
|
|
|
|
; CHECK1-NEXT: [[OMP_GLOBAL_THREAD_NUM3:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
|
|
|
|
|
; CHECK1-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB2]], i32 [[OMP_GLOBAL_THREAD_NUM3]])
|
|
|
|
|
; CHECK1-NEXT: [[TMP5:%.*]] = icmp ne i32 [[TMP4]], 0
|
|
|
|
|
; CHECK1-NEXT: br i1 [[TMP5]], label [[OMP_REGION_BODY5:%.*]], label [[OMP_REGION_END4:%.*]]
|
|
|
|
|
; CHECK1-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB2]], i32 [[OMP_GLOBAL_THREAD_NUM3]])
|
|
|
|
|
; CHECK1-NEXT: [[TMP6:%.*]] = icmp ne i32 [[TMP5]], 0
|
|
|
|
|
; CHECK1-NEXT: br i1 [[TMP6]], label [[OMP_REGION_BODY5:%.*]], label [[OMP_REGION_END4:%.*]]
|
|
|
|
|
; CHECK1: omp_region.end4:
|
|
|
|
|
; CHECK1-NEXT: [[OMP_GLOBAL_THREAD_NUM6:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
|
|
|
|
|
; CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB3]], i32 [[OMP_GLOBAL_THREAD_NUM6]])
|
|
|
|
@ -5646,9 +5671,8 @@ entry:
|
|
|
|
|
; CHECK1: omp_region.body5:
|
|
|
|
|
; CHECK1-NEXT: br label [[SEQ_PAR_MERGED2:%.*]]
|
|
|
|
|
; CHECK1: seq.par.merged2:
|
|
|
|
|
; CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[LOADGEP_A_ADDR]], align 4
|
|
|
|
|
; CHECK1-NEXT: [[ADD_SEQ_OUTPUT_LOAD:%.*]] = load i32, i32* [[LOADGEP_ADD_SEQ_OUTPUT_ALLOC]], align 4
|
|
|
|
|
; CHECK1-NEXT: [[ADD1:%.*]] = add nsw i32 [[ADD_SEQ_OUTPUT_LOAD]], [[TMP6]]
|
|
|
|
|
; CHECK1-NEXT: [[ADD1:%.*]] = add nsw i32 [[ADD_SEQ_OUTPUT_LOAD]], [[TMP2]]
|
|
|
|
|
; CHECK1-NEXT: store i32 [[ADD1]], i32* [[LOADGEP_ADD1_SEQ_OUTPUT_ALLOC]], align 4
|
|
|
|
|
; CHECK1-NEXT: br label [[OMP_PAR_MERGED_SPLIT_SPLIT_SPLIT:%.*]]
|
|
|
|
|
; CHECK1: omp.par.merged.split.split.split:
|
|
|
|
@ -5659,8 +5683,7 @@ entry:
|
|
|
|
|
; CHECK1: omp_region.body:
|
|
|
|
|
; CHECK1-NEXT: br label [[SEQ_PAR_MERGED:%.*]]
|
|
|
|
|
; CHECK1: seq.par.merged:
|
|
|
|
|
; CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[LOADGEP_A_ADDR]], align 4
|
|
|
|
|
; CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP7]], 1
|
|
|
|
|
; CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], 1
|
|
|
|
|
; CHECK1-NEXT: store i32 [[ADD]], i32* [[LOADGEP_ADD_SEQ_OUTPUT_ALLOC]], align 4
|
|
|
|
|
; CHECK1-NEXT: br label [[OMP_PAR_MERGED_SPLIT:%.*]]
|
|
|
|
|
; CHECK1: omp.par.merged.split:
|
|
|
|
@ -5777,8 +5800,7 @@ entry:
|
|
|
|
|
; CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* noundef nonnull align 8 dereferenceable(24) @[[GLOB1]])
|
|
|
|
|
; CHECK1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
|
|
|
|
|
; CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* noundef nonnull align 8 dereferenceable(24) @[[GLOB1]], i32 noundef 1, void (i32*, i32*, ...)* noundef bitcast (void (i32*, i32*, i32*)* @.omp_outlined..34 to void (i32*, i32*, ...)*), i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A_ADDR]])
|
|
|
|
|
; CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
|
|
|
|
|
; CHECK1-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* noundef nonnull align 8 dereferenceable(24) @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]])
|
|
|
|
|
; CHECK1-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* noundef nonnull align 8 dereferenceable(24) @[[GLOB1]], i32 [[TMP0]], i32 [[A]])
|
|
|
|
|
; CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* noundef nonnull align 8 dereferenceable(24) @[[GLOB1]], i32 noundef 1, void (i32*, i32*, ...)* noundef bitcast (void (i32*, i32*, i32*)* @.omp_outlined..35 to void (i32*, i32*, ...)*), i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A_ADDR]])
|
|
|
|
|
; CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* noundef nonnull align 8 dereferenceable(24) @[[GLOB1]], i32 noundef 1, void (i32*, i32*, ...)* noundef bitcast (void (i32*, i32*, i32*)* @.omp_outlined..36 to void (i32*, i32*, ...)*), i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A_ADDR]])
|
|
|
|
|
; CHECK1-NEXT: ret void
|
|
|
|
@ -6122,17 +6144,21 @@ entry:
|
|
|
|
|
; CHECK2-LABEL: define {{[^@]+}}@merge_seq_float
|
|
|
|
|
; CHECK2-SAME: (float [[F:%.*]], float* nocapture nofree writeonly [[P:%.*]]) local_unnamed_addr {
|
|
|
|
|
; CHECK2-NEXT: entry:
|
|
|
|
|
; CHECK2-NEXT: [[STRUCTARG:%.*]] = alloca { float*, float* }, align 8
|
|
|
|
|
; CHECK2-NEXT: [[STRUCTARG:%.*]] = alloca { float*, float*, float* }, align 8
|
|
|
|
|
; CHECK2-NEXT: [[F_RELOADED:%.*]] = alloca float, align 4
|
|
|
|
|
; CHECK2-NEXT: [[F_ADDR:%.*]] = alloca float, align 4
|
|
|
|
|
; CHECK2-NEXT: store float [[F]], float* [[F_ADDR]], align 4
|
|
|
|
|
; CHECK2-NEXT: [[OMP_GLOBAL_THREAD_NUM2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
|
|
|
|
|
; CHECK2-NEXT: store float [[F]], float* [[F_RELOADED]], align 4
|
|
|
|
|
; CHECK2-NEXT: br label [[OMP_PARALLEL:%.*]]
|
|
|
|
|
; CHECK2: omp_parallel:
|
|
|
|
|
; CHECK2-NEXT: [[GEP_F_ADDR:%.*]] = getelementptr { float*, float* }, { float*, float* }* [[STRUCTARG]], i32 0, i32 0
|
|
|
|
|
; CHECK2-NEXT: [[GEP_F_RELOADED:%.*]] = getelementptr { float*, float*, float* }, { float*, float*, float* }* [[STRUCTARG]], i32 0, i32 0
|
|
|
|
|
; CHECK2-NEXT: store float* [[F_RELOADED]], float** [[GEP_F_RELOADED]], align 8
|
|
|
|
|
; CHECK2-NEXT: [[GEP_F_ADDR:%.*]] = getelementptr { float*, float*, float* }, { float*, float*, float* }* [[STRUCTARG]], i32 0, i32 1
|
|
|
|
|
; CHECK2-NEXT: store float* [[F_ADDR]], float** [[GEP_F_ADDR]], align 8
|
|
|
|
|
; CHECK2-NEXT: [[GEP_P:%.*]] = getelementptr { float*, float* }, { float*, float* }* [[STRUCTARG]], i32 0, i32 1
|
|
|
|
|
; CHECK2-NEXT: [[GEP_P:%.*]] = getelementptr { float*, float*, float* }, { float*, float*, float* }* [[STRUCTARG]], i32 0, i32 2
|
|
|
|
|
; CHECK2-NEXT: store float* [[P]], float** [[GEP_P]], align 8
|
|
|
|
|
; CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, { float*, float* }*)* @merge_seq_float..omp_par to void (i32*, i32*, ...)*), { float*, float* }* [[STRUCTARG]])
|
|
|
|
|
; CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, { float*, float*, float* }*)* @merge_seq_float..omp_par to void (i32*, i32*, ...)*), { float*, float*, float* }* [[STRUCTARG]])
|
|
|
|
|
; CHECK2-NEXT: br label [[OMP_PAR_OUTLINED_EXIT:%.*]]
|
|
|
|
|
; CHECK2: omp.par.outlined.exit:
|
|
|
|
|
; CHECK2-NEXT: br label [[OMP_PAR_EXIT_SPLIT:%.*]]
|
|
|
|
@ -6143,16 +6169,19 @@ entry:
|
|
|
|
|
;
|
|
|
|
|
;
|
|
|
|
|
; CHECK2-LABEL: define {{[^@]+}}@merge_seq_float..omp_par
|
|
|
|
|
; CHECK2-SAME: (i32* noalias [[TID_ADDR:%.*]], i32* noalias [[ZERO_ADDR:%.*]], { float*, float* }* [[TMP0:%.*]]) #[[ATTR0]] {
|
|
|
|
|
; CHECK2-SAME: (i32* noalias [[TID_ADDR:%.*]], i32* noalias [[ZERO_ADDR:%.*]], { float*, float*, float* }* [[TMP0:%.*]]) #[[ATTR0]] {
|
|
|
|
|
; CHECK2-NEXT: omp.par.entry:
|
|
|
|
|
; CHECK2-NEXT: [[GEP_F_ADDR:%.*]] = getelementptr { float*, float* }, { float*, float* }* [[TMP0]], i32 0, i32 0
|
|
|
|
|
; CHECK2-NEXT: [[GEP_F_RELOADED:%.*]] = getelementptr { float*, float*, float* }, { float*, float*, float* }* [[TMP0]], i32 0, i32 0
|
|
|
|
|
; CHECK2-NEXT: [[LOADGEP_F_RELOADED:%.*]] = load float*, float** [[GEP_F_RELOADED]], align 8
|
|
|
|
|
; CHECK2-NEXT: [[GEP_F_ADDR:%.*]] = getelementptr { float*, float*, float* }, { float*, float*, float* }* [[TMP0]], i32 0, i32 1
|
|
|
|
|
; CHECK2-NEXT: [[LOADGEP_F_ADDR:%.*]] = load float*, float** [[GEP_F_ADDR]], align 8
|
|
|
|
|
; CHECK2-NEXT: [[GEP_P:%.*]] = getelementptr { float*, float* }, { float*, float* }* [[TMP0]], i32 0, i32 1
|
|
|
|
|
; CHECK2-NEXT: [[GEP_P:%.*]] = getelementptr { float*, float*, float* }, { float*, float*, float* }* [[TMP0]], i32 0, i32 2
|
|
|
|
|
; CHECK2-NEXT: [[LOADGEP_P:%.*]] = load float*, float** [[GEP_P]], align 8
|
|
|
|
|
; CHECK2-NEXT: [[TID_ADDR_LOCAL:%.*]] = alloca i32, align 4
|
|
|
|
|
; CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TID_ADDR]], align 4
|
|
|
|
|
; CHECK2-NEXT: store i32 [[TMP1]], i32* [[TID_ADDR_LOCAL]], align 4
|
|
|
|
|
; CHECK2-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
|
|
|
|
|
; CHECK2-NEXT: [[TMP2:%.*]] = load float, float* [[LOADGEP_F_RELOADED]], align 4
|
|
|
|
|
; CHECK2-NEXT: br label [[OMP_PAR_REGION:%.*]]
|
|
|
|
|
; CHECK2: omp.par.region:
|
|
|
|
|
; CHECK2-NEXT: br label [[OMP_PAR_MERGED:%.*]]
|
|
|
|
@ -6161,9 +6190,9 @@ entry:
|
|
|
|
|
; CHECK2-NEXT: [[OMP_GLOBAL_THREAD_NUM2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
|
|
|
|
|
; CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB3]], i32 [[OMP_GLOBAL_THREAD_NUM2]])
|
|
|
|
|
; CHECK2-NEXT: [[OMP_GLOBAL_THREAD_NUM:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
|
|
|
|
|
; CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB2]], i32 [[OMP_GLOBAL_THREAD_NUM]])
|
|
|
|
|
; CHECK2-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
|
|
|
|
|
; CHECK2-NEXT: br i1 [[TMP3]], label [[OMP_REGION_BODY:%.*]], label [[OMP_REGION_END:%.*]]
|
|
|
|
|
; CHECK2-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB2]], i32 [[OMP_GLOBAL_THREAD_NUM]])
|
|
|
|
|
; CHECK2-NEXT: [[TMP4:%.*]] = icmp ne i32 [[TMP3]], 0
|
|
|
|
|
; CHECK2-NEXT: br i1 [[TMP4]], label [[OMP_REGION_BODY:%.*]], label [[OMP_REGION_END:%.*]]
|
|
|
|
|
; CHECK2: omp_region.end:
|
|
|
|
|
; CHECK2-NEXT: [[OMP_GLOBAL_THREAD_NUM1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
|
|
|
|
|
; CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB3]], i32 [[OMP_GLOBAL_THREAD_NUM1]])
|
|
|
|
@ -6180,8 +6209,7 @@ entry:
|
|
|
|
|
; CHECK2: omp_region.body:
|
|
|
|
|
; CHECK2-NEXT: br label [[SEQ_PAR_MERGED:%.*]]
|
|
|
|
|
; CHECK2: seq.par.merged:
|
|
|
|
|
; CHECK2-NEXT: [[TMP4:%.*]] = load float, float* [[LOADGEP_F_ADDR]], align 4
|
|
|
|
|
; CHECK2-NEXT: [[ADD:%.*]] = fadd float [[TMP4]], 0x40091EB860000000
|
|
|
|
|
; CHECK2-NEXT: [[ADD:%.*]] = fadd float [[TMP2]], 0x40091EB860000000
|
|
|
|
|
; CHECK2-NEXT: store float [[ADD]], float* [[LOADGEP_P]], align 4
|
|
|
|
|
; CHECK2-NEXT: br label [[OMP_PAR_MERGED_SPLIT:%.*]]
|
|
|
|
|
; CHECK2: omp.par.merged.split:
|
|
|
|
@ -6400,20 +6428,24 @@ entry:
|
|
|
|
|
; CHECK2-LABEL: define {{[^@]+}}@merge_seq_par_use
|
|
|
|
|
; CHECK2-SAME: (i32 [[A:%.*]]) local_unnamed_addr {
|
|
|
|
|
; CHECK2-NEXT: entry:
|
|
|
|
|
; CHECK2-NEXT: [[STRUCTARG:%.*]] = alloca { i32*, i32* }, align 8
|
|
|
|
|
; CHECK2-NEXT: [[STRUCTARG:%.*]] = alloca { i32*, i32*, i32* }, align 8
|
|
|
|
|
; CHECK2-NEXT: [[A_RELOADED:%.*]] = alloca i32, align 4
|
|
|
|
|
; CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
|
|
|
|
|
; CHECK2-NEXT: [[B:%.*]] = alloca i32, align 4
|
|
|
|
|
; CHECK2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
|
|
|
|
|
; CHECK2-NEXT: [[OMP_GLOBAL_THREAD_NUM2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
|
|
|
|
|
; CHECK2-NEXT: store i32 [[A]], i32* [[A_RELOADED]], align 4
|
|
|
|
|
; CHECK2-NEXT: br label [[OMP_PARALLEL:%.*]]
|
|
|
|
|
; CHECK2: omp_parallel:
|
|
|
|
|
; CHECK2-NEXT: [[GEP_A_ADDR:%.*]] = getelementptr { i32*, i32* }, { i32*, i32* }* [[STRUCTARG]], i32 0, i32 0
|
|
|
|
|
; CHECK2-NEXT: [[GEP_A_RELOADED:%.*]] = getelementptr { i32*, i32*, i32* }, { i32*, i32*, i32* }* [[STRUCTARG]], i32 0, i32 0
|
|
|
|
|
; CHECK2-NEXT: store i32* [[A_RELOADED]], i32** [[GEP_A_RELOADED]], align 8
|
|
|
|
|
; CHECK2-NEXT: [[GEP_A_ADDR:%.*]] = getelementptr { i32*, i32*, i32* }, { i32*, i32*, i32* }* [[STRUCTARG]], i32 0, i32 1
|
|
|
|
|
; CHECK2-NEXT: store i32* [[A_ADDR]], i32** [[GEP_A_ADDR]], align 8
|
|
|
|
|
; CHECK2-NEXT: [[GEP_B:%.*]] = getelementptr { i32*, i32* }, { i32*, i32* }* [[STRUCTARG]], i32 0, i32 1
|
|
|
|
|
; CHECK2-NEXT: [[GEP_B:%.*]] = getelementptr { i32*, i32*, i32* }, { i32*, i32*, i32* }* [[STRUCTARG]], i32 0, i32 2
|
|
|
|
|
; CHECK2-NEXT: store i32* [[B]], i32** [[GEP_B]], align 8
|
|
|
|
|
; CHECK2-NEXT: [[LT_CAST3:%.*]] = bitcast i32* [[B]] to i8*
|
|
|
|
|
; CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 -1, i8* [[LT_CAST3]])
|
|
|
|
|
; CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, { i32*, i32* }*)* @merge_seq_par_use..omp_par to void (i32*, i32*, ...)*), { i32*, i32* }* [[STRUCTARG]])
|
|
|
|
|
; CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, { i32*, i32*, i32* }*)* @merge_seq_par_use..omp_par to void (i32*, i32*, ...)*), { i32*, i32*, i32* }* [[STRUCTARG]])
|
|
|
|
|
; CHECK2-NEXT: br label [[OMP_PAR_OUTLINED_EXIT:%.*]]
|
|
|
|
|
; CHECK2: omp.par.outlined.exit:
|
|
|
|
|
; CHECK2-NEXT: br label [[OMP_PAR_EXIT_SPLIT:%.*]]
|
|
|
|
@ -6426,16 +6458,19 @@ entry:
|
|
|
|
|
;
|
|
|
|
|
;
|
|
|
|
|
; CHECK2-LABEL: define {{[^@]+}}@merge_seq_par_use..omp_par
|
|
|
|
|
; CHECK2-SAME: (i32* noalias [[TID_ADDR:%.*]], i32* noalias [[ZERO_ADDR:%.*]], { i32*, i32* }* [[TMP0:%.*]]) #[[ATTR0]] {
|
|
|
|
|
; CHECK2-SAME: (i32* noalias [[TID_ADDR:%.*]], i32* noalias [[ZERO_ADDR:%.*]], { i32*, i32*, i32* }* [[TMP0:%.*]]) #[[ATTR0]] {
|
|
|
|
|
; CHECK2-NEXT: omp.par.entry:
|
|
|
|
|
; CHECK2-NEXT: [[GEP_A_ADDR:%.*]] = getelementptr { i32*, i32* }, { i32*, i32* }* [[TMP0]], i32 0, i32 0
|
|
|
|
|
; CHECK2-NEXT: [[GEP_A_RELOADED:%.*]] = getelementptr { i32*, i32*, i32* }, { i32*, i32*, i32* }* [[TMP0]], i32 0, i32 0
|
|
|
|
|
; CHECK2-NEXT: [[LOADGEP_A_RELOADED:%.*]] = load i32*, i32** [[GEP_A_RELOADED]], align 8
|
|
|
|
|
; CHECK2-NEXT: [[GEP_A_ADDR:%.*]] = getelementptr { i32*, i32*, i32* }, { i32*, i32*, i32* }* [[TMP0]], i32 0, i32 1
|
|
|
|
|
; CHECK2-NEXT: [[LOADGEP_A_ADDR:%.*]] = load i32*, i32** [[GEP_A_ADDR]], align 8
|
|
|
|
|
; CHECK2-NEXT: [[GEP_B:%.*]] = getelementptr { i32*, i32* }, { i32*, i32* }* [[TMP0]], i32 0, i32 1
|
|
|
|
|
; CHECK2-NEXT: [[GEP_B:%.*]] = getelementptr { i32*, i32*, i32* }, { i32*, i32*, i32* }* [[TMP0]], i32 0, i32 2
|
|
|
|
|
; CHECK2-NEXT: [[LOADGEP_B:%.*]] = load i32*, i32** [[GEP_B]], align 8
|
|
|
|
|
; CHECK2-NEXT: [[TID_ADDR_LOCAL:%.*]] = alloca i32, align 4
|
|
|
|
|
; CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TID_ADDR]], align 4
|
|
|
|
|
; CHECK2-NEXT: store i32 [[TMP1]], i32* [[TID_ADDR_LOCAL]], align 4
|
|
|
|
|
; CHECK2-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
|
|
|
|
|
; CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[LOADGEP_A_RELOADED]], align 4
|
|
|
|
|
; CHECK2-NEXT: br label [[OMP_PAR_REGION:%.*]]
|
|
|
|
|
; CHECK2: omp.par.region:
|
|
|
|
|
; CHECK2-NEXT: br label [[OMP_PAR_MERGED:%.*]]
|
|
|
|
@ -6444,9 +6479,9 @@ entry:
|
|
|
|
|
; CHECK2-NEXT: [[OMP_GLOBAL_THREAD_NUM2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
|
|
|
|
|
; CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB3]], i32 [[OMP_GLOBAL_THREAD_NUM2]])
|
|
|
|
|
; CHECK2-NEXT: [[OMP_GLOBAL_THREAD_NUM:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
|
|
|
|
|
; CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB2]], i32 [[OMP_GLOBAL_THREAD_NUM]])
|
|
|
|
|
; CHECK2-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
|
|
|
|
|
; CHECK2-NEXT: br i1 [[TMP3]], label [[OMP_REGION_BODY:%.*]], label [[OMP_REGION_END:%.*]]
|
|
|
|
|
; CHECK2-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB2]], i32 [[OMP_GLOBAL_THREAD_NUM]])
|
|
|
|
|
; CHECK2-NEXT: [[TMP4:%.*]] = icmp ne i32 [[TMP3]], 0
|
|
|
|
|
; CHECK2-NEXT: br i1 [[TMP4]], label [[OMP_REGION_BODY:%.*]], label [[OMP_REGION_END:%.*]]
|
|
|
|
|
; CHECK2: omp_region.end:
|
|
|
|
|
; CHECK2-NEXT: [[OMP_GLOBAL_THREAD_NUM1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
|
|
|
|
|
; CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB3]], i32 [[OMP_GLOBAL_THREAD_NUM1]])
|
|
|
|
@ -6463,9 +6498,8 @@ entry:
|
|
|
|
|
; CHECK2: omp_region.body:
|
|
|
|
|
; CHECK2-NEXT: br label [[SEQ_PAR_MERGED:%.*]]
|
|
|
|
|
; CHECK2: seq.par.merged:
|
|
|
|
|
; CHECK2-NEXT: [[TMP4:%.*]] = bitcast i32* [[LOADGEP_B]] to i8*
|
|
|
|
|
; CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[LOADGEP_A_ADDR]], align 4
|
|
|
|
|
; CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP5]], 1
|
|
|
|
|
; CHECK2-NEXT: [[TMP5:%.*]] = bitcast i32* [[LOADGEP_B]] to i8*
|
|
|
|
|
; CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], 1
|
|
|
|
|
; CHECK2-NEXT: store i32 [[ADD]], i32* [[LOADGEP_B]], align 4
|
|
|
|
|
; CHECK2-NEXT: br label [[OMP_PAR_MERGED_SPLIT:%.*]]
|
|
|
|
|
; CHECK2: omp.par.merged.split:
|
|
|
|
@ -6581,19 +6615,23 @@ entry:
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|
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|
|
; CHECK2-LABEL: define {{[^@]+}}@merge_cancellable_regions_seq
|
|
|
|
|
; CHECK2-SAME: (i32 [[CANCEL1:%.*]], i32 [[CANCEL2:%.*]]) local_unnamed_addr {
|
|
|
|
|
; CHECK2-NEXT: entry:
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|
|
|
|
; CHECK2-NEXT: [[STRUCTARG:%.*]] = alloca { i32*, i32* }, align 8
|
|
|
|
|
; CHECK2-NEXT: [[STRUCTARG:%.*]] = alloca { i32*, i32*, i32* }, align 8
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|
|
|
|
; CHECK2-NEXT: [[CANCEL1_RELOADED:%.*]] = alloca i32, align 4
|
|
|
|
|
; CHECK2-NEXT: [[CANCEL1_ADDR:%.*]] = alloca i32, align 4
|
|
|
|
|
; CHECK2-NEXT: [[CANCEL2_ADDR:%.*]] = alloca i32, align 4
|
|
|
|
|
; CHECK2-NEXT: store i32 [[CANCEL1]], i32* [[CANCEL1_ADDR]], align 4
|
|
|
|
|
; CHECK2-NEXT: store i32 [[CANCEL2]], i32* [[CANCEL2_ADDR]], align 4
|
|
|
|
|
; CHECK2-NEXT: [[OMP_GLOBAL_THREAD_NUM2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
|
|
|
|
|
; CHECK2-NEXT: store i32 [[CANCEL1]], i32* [[CANCEL1_RELOADED]], align 4
|
|
|
|
|
; CHECK2-NEXT: br label [[OMP_PARALLEL:%.*]]
|
|
|
|
|
; CHECK2: omp_parallel:
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|
|
|
|
; CHECK2-NEXT: [[GEP_CANCEL1_ADDR:%.*]] = getelementptr { i32*, i32* }, { i32*, i32* }* [[STRUCTARG]], i32 0, i32 0
|
|
|
|
|
; CHECK2-NEXT: [[GEP_CANCEL1_RELOADED:%.*]] = getelementptr { i32*, i32*, i32* }, { i32*, i32*, i32* }* [[STRUCTARG]], i32 0, i32 0
|
|
|
|
|
; CHECK2-NEXT: store i32* [[CANCEL1_RELOADED]], i32** [[GEP_CANCEL1_RELOADED]], align 8
|
|
|
|
|
; CHECK2-NEXT: [[GEP_CANCEL1_ADDR:%.*]] = getelementptr { i32*, i32*, i32* }, { i32*, i32*, i32* }* [[STRUCTARG]], i32 0, i32 1
|
|
|
|
|
; CHECK2-NEXT: store i32* [[CANCEL1_ADDR]], i32** [[GEP_CANCEL1_ADDR]], align 8
|
|
|
|
|
; CHECK2-NEXT: [[GEP_CANCEL2_ADDR:%.*]] = getelementptr { i32*, i32* }, { i32*, i32* }* [[STRUCTARG]], i32 0, i32 1
|
|
|
|
|
; CHECK2-NEXT: [[GEP_CANCEL2_ADDR:%.*]] = getelementptr { i32*, i32*, i32* }, { i32*, i32*, i32* }* [[STRUCTARG]], i32 0, i32 2
|
|
|
|
|
; CHECK2-NEXT: store i32* [[CANCEL2_ADDR]], i32** [[GEP_CANCEL2_ADDR]], align 8
|
|
|
|
|
; CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, { i32*, i32* }*)* @merge_cancellable_regions_seq..omp_par to void (i32*, i32*, ...)*), { i32*, i32* }* [[STRUCTARG]])
|
|
|
|
|
; CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, { i32*, i32*, i32* }*)* @merge_cancellable_regions_seq..omp_par to void (i32*, i32*, ...)*), { i32*, i32*, i32* }* [[STRUCTARG]])
|
|
|
|
|
; CHECK2-NEXT: br label [[OMP_PAR_OUTLINED_EXIT:%.*]]
|
|
|
|
|
; CHECK2: omp.par.outlined.exit:
|
|
|
|
|
; CHECK2-NEXT: br label [[OMP_PAR_EXIT_SPLIT:%.*]]
|
|
|
|
@ -6604,16 +6642,19 @@ entry:
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|
|
|
|
;
|
|
|
|
|
;
|
|
|
|
|
; CHECK2-LABEL: define {{[^@]+}}@merge_cancellable_regions_seq..omp_par
|
|
|
|
|
; CHECK2-SAME: (i32* noalias [[TID_ADDR:%.*]], i32* noalias [[ZERO_ADDR:%.*]], { i32*, i32* }* [[TMP0:%.*]]) #[[ATTR0]] {
|
|
|
|
|
; CHECK2-SAME: (i32* noalias [[TID_ADDR:%.*]], i32* noalias [[ZERO_ADDR:%.*]], { i32*, i32*, i32* }* [[TMP0:%.*]]) #[[ATTR0]] {
|
|
|
|
|
; CHECK2-NEXT: omp.par.entry:
|
|
|
|
|
; CHECK2-NEXT: [[GEP_CANCEL1_ADDR:%.*]] = getelementptr { i32*, i32* }, { i32*, i32* }* [[TMP0]], i32 0, i32 0
|
|
|
|
|
; CHECK2-NEXT: [[GEP_CANCEL1_RELOADED:%.*]] = getelementptr { i32*, i32*, i32* }, { i32*, i32*, i32* }* [[TMP0]], i32 0, i32 0
|
|
|
|
|
; CHECK2-NEXT: [[LOADGEP_CANCEL1_RELOADED:%.*]] = load i32*, i32** [[GEP_CANCEL1_RELOADED]], align 8
|
|
|
|
|
; CHECK2-NEXT: [[GEP_CANCEL1_ADDR:%.*]] = getelementptr { i32*, i32*, i32* }, { i32*, i32*, i32* }* [[TMP0]], i32 0, i32 1
|
|
|
|
|
; CHECK2-NEXT: [[LOADGEP_CANCEL1_ADDR:%.*]] = load i32*, i32** [[GEP_CANCEL1_ADDR]], align 8
|
|
|
|
|
; CHECK2-NEXT: [[GEP_CANCEL2_ADDR:%.*]] = getelementptr { i32*, i32* }, { i32*, i32* }* [[TMP0]], i32 0, i32 1
|
|
|
|
|
; CHECK2-NEXT: [[GEP_CANCEL2_ADDR:%.*]] = getelementptr { i32*, i32*, i32* }, { i32*, i32*, i32* }* [[TMP0]], i32 0, i32 2
|
|
|
|
|
; CHECK2-NEXT: [[LOADGEP_CANCEL2_ADDR:%.*]] = load i32*, i32** [[GEP_CANCEL2_ADDR]], align 8
|
|
|
|
|
; CHECK2-NEXT: [[TID_ADDR_LOCAL:%.*]] = alloca i32, align 4
|
|
|
|
|
; CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TID_ADDR]], align 4
|
|
|
|
|
; CHECK2-NEXT: store i32 [[TMP1]], i32* [[TID_ADDR_LOCAL]], align 4
|
|
|
|
|
; CHECK2-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
|
|
|
|
|
; CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[LOADGEP_CANCEL1_RELOADED]], align 4
|
|
|
|
|
; CHECK2-NEXT: br label [[OMP_PAR_REGION:%.*]]
|
|
|
|
|
; CHECK2: omp.par.region:
|
|
|
|
|
; CHECK2-NEXT: br label [[OMP_PAR_MERGED:%.*]]
|
|
|
|
@ -6622,9 +6663,9 @@ entry:
|
|
|
|
|
; CHECK2-NEXT: [[OMP_GLOBAL_THREAD_NUM2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
|
|
|
|
|
; CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB3]], i32 [[OMP_GLOBAL_THREAD_NUM2]])
|
|
|
|
|
; CHECK2-NEXT: [[OMP_GLOBAL_THREAD_NUM:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
|
|
|
|
|
; CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB2]], i32 [[OMP_GLOBAL_THREAD_NUM]])
|
|
|
|
|
; CHECK2-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
|
|
|
|
|
; CHECK2-NEXT: br i1 [[TMP3]], label [[OMP_REGION_BODY:%.*]], label [[OMP_REGION_END:%.*]]
|
|
|
|
|
; CHECK2-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB2]], i32 [[OMP_GLOBAL_THREAD_NUM]])
|
|
|
|
|
; CHECK2-NEXT: [[TMP4:%.*]] = icmp ne i32 [[TMP3]], 0
|
|
|
|
|
; CHECK2-NEXT: br i1 [[TMP4]], label [[OMP_REGION_BODY:%.*]], label [[OMP_REGION_END:%.*]]
|
|
|
|
|
; CHECK2: omp_region.end:
|
|
|
|
|
; CHECK2-NEXT: [[OMP_GLOBAL_THREAD_NUM1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
|
|
|
|
|
; CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB3]], i32 [[OMP_GLOBAL_THREAD_NUM1]])
|
|
|
|
@ -6641,8 +6682,7 @@ entry:
|
|
|
|
|
; CHECK2: omp_region.body:
|
|
|
|
|
; CHECK2-NEXT: br label [[SEQ_PAR_MERGED:%.*]]
|
|
|
|
|
; CHECK2: seq.par.merged:
|
|
|
|
|
; CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[LOADGEP_CANCEL1_ADDR]], align 4
|
|
|
|
|
; CHECK2-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[TMP4]], 0
|
|
|
|
|
; CHECK2-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[TMP2]], 0
|
|
|
|
|
; CHECK2-NEXT: [[LNOT_EXT:%.*]] = zext i1 [[TOBOOL_NOT]] to i32
|
|
|
|
|
; CHECK2-NEXT: store i32 [[LNOT_EXT]], i32* [[LOADGEP_CANCEL2_ADDR]], align 4
|
|
|
|
|
; CHECK2-NEXT: br label [[OMP_PAR_MERGED_SPLIT:%.*]]
|
|
|
|
@ -6762,21 +6802,25 @@ entry:
|
|
|
|
|
; CHECK2-LABEL: define {{[^@]+}}@merge_3_seq
|
|
|
|
|
; CHECK2-SAME: (i32 [[A:%.*]], i32 [[B:%.*]]) local_unnamed_addr {
|
|
|
|
|
; CHECK2-NEXT: entry:
|
|
|
|
|
; CHECK2-NEXT: [[STRUCTARG:%.*]] = alloca { i32*, i32*, i32* }, align 8
|
|
|
|
|
; CHECK2-NEXT: [[STRUCTARG:%.*]] = alloca { i32*, i32*, i32*, i32* }, align 8
|
|
|
|
|
; CHECK2-NEXT: [[A_RELOADED:%.*]] = alloca i32, align 4
|
|
|
|
|
; CHECK2-NEXT: [[ADD1_SEQ_OUTPUT_ALLOC:%.*]] = alloca i32, align 4
|
|
|
|
|
; CHECK2-NEXT: [[ADD_SEQ_OUTPUT_ALLOC:%.*]] = alloca i32, align 4
|
|
|
|
|
; CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
|
|
|
|
|
; CHECK2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
|
|
|
|
|
; CHECK2-NEXT: [[OMP_GLOBAL_THREAD_NUM7:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
|
|
|
|
|
; CHECK2-NEXT: store i32 [[A]], i32* [[A_RELOADED]], align 4
|
|
|
|
|
; CHECK2-NEXT: br label [[OMP_PARALLEL:%.*]]
|
|
|
|
|
; CHECK2: omp_parallel:
|
|
|
|
|
; CHECK2-NEXT: [[GEP_A_ADDR:%.*]] = getelementptr { i32*, i32*, i32* }, { i32*, i32*, i32* }* [[STRUCTARG]], i32 0, i32 0
|
|
|
|
|
; CHECK2-NEXT: [[GEP_A_RELOADED:%.*]] = getelementptr { i32*, i32*, i32*, i32* }, { i32*, i32*, i32*, i32* }* [[STRUCTARG]], i32 0, i32 0
|
|
|
|
|
; CHECK2-NEXT: store i32* [[A_RELOADED]], i32** [[GEP_A_RELOADED]], align 8
|
|
|
|
|
; CHECK2-NEXT: [[GEP_A_ADDR:%.*]] = getelementptr { i32*, i32*, i32*, i32* }, { i32*, i32*, i32*, i32* }* [[STRUCTARG]], i32 0, i32 1
|
|
|
|
|
; CHECK2-NEXT: store i32* [[A_ADDR]], i32** [[GEP_A_ADDR]], align 8
|
|
|
|
|
; CHECK2-NEXT: [[GEP_ADD_SEQ_OUTPUT_ALLOC:%.*]] = getelementptr { i32*, i32*, i32* }, { i32*, i32*, i32* }* [[STRUCTARG]], i32 0, i32 1
|
|
|
|
|
; CHECK2-NEXT: [[GEP_ADD_SEQ_OUTPUT_ALLOC:%.*]] = getelementptr { i32*, i32*, i32*, i32* }, { i32*, i32*, i32*, i32* }* [[STRUCTARG]], i32 0, i32 2
|
|
|
|
|
; CHECK2-NEXT: store i32* [[ADD_SEQ_OUTPUT_ALLOC]], i32** [[GEP_ADD_SEQ_OUTPUT_ALLOC]], align 8
|
|
|
|
|
; CHECK2-NEXT: [[GEP_ADD1_SEQ_OUTPUT_ALLOC:%.*]] = getelementptr { i32*, i32*, i32* }, { i32*, i32*, i32* }* [[STRUCTARG]], i32 0, i32 2
|
|
|
|
|
; CHECK2-NEXT: [[GEP_ADD1_SEQ_OUTPUT_ALLOC:%.*]] = getelementptr { i32*, i32*, i32*, i32* }, { i32*, i32*, i32*, i32* }* [[STRUCTARG]], i32 0, i32 3
|
|
|
|
|
; CHECK2-NEXT: store i32* [[ADD1_SEQ_OUTPUT_ALLOC]], i32** [[GEP_ADD1_SEQ_OUTPUT_ALLOC]], align 8
|
|
|
|
|
; CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, { i32*, i32*, i32* }*)* @merge_3_seq..omp_par to void (i32*, i32*, ...)*), { i32*, i32*, i32* }* [[STRUCTARG]])
|
|
|
|
|
; CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, { i32*, i32*, i32*, i32* }*)* @merge_3_seq..omp_par to void (i32*, i32*, ...)*), { i32*, i32*, i32*, i32* }* [[STRUCTARG]])
|
|
|
|
|
; CHECK2-NEXT: br label [[OMP_PAR_OUTLINED_EXIT:%.*]]
|
|
|
|
|
; CHECK2: omp.par.outlined.exit:
|
|
|
|
|
; CHECK2-NEXT: br label [[OMP_PAR_EXIT_SPLIT:%.*]]
|
|
|
|
@ -6789,18 +6833,21 @@ entry:
|
|
|
|
|
;
|
|
|
|
|
;
|
|
|
|
|
; CHECK2-LABEL: define {{[^@]+}}@merge_3_seq..omp_par
|
|
|
|
|
; CHECK2-SAME: (i32* noalias [[TID_ADDR:%.*]], i32* noalias [[ZERO_ADDR:%.*]], { i32*, i32*, i32* }* [[TMP0:%.*]]) #[[ATTR0]] {
|
|
|
|
|
; CHECK2-SAME: (i32* noalias [[TID_ADDR:%.*]], i32* noalias [[ZERO_ADDR:%.*]], { i32*, i32*, i32*, i32* }* [[TMP0:%.*]]) #[[ATTR0]] {
|
|
|
|
|
; CHECK2-NEXT: omp.par.entry:
|
|
|
|
|
; CHECK2-NEXT: [[GEP_A_ADDR:%.*]] = getelementptr { i32*, i32*, i32* }, { i32*, i32*, i32* }* [[TMP0]], i32 0, i32 0
|
|
|
|
|
; CHECK2-NEXT: [[GEP_A_RELOADED:%.*]] = getelementptr { i32*, i32*, i32*, i32* }, { i32*, i32*, i32*, i32* }* [[TMP0]], i32 0, i32 0
|
|
|
|
|
; CHECK2-NEXT: [[LOADGEP_A_RELOADED:%.*]] = load i32*, i32** [[GEP_A_RELOADED]], align 8
|
|
|
|
|
; CHECK2-NEXT: [[GEP_A_ADDR:%.*]] = getelementptr { i32*, i32*, i32*, i32* }, { i32*, i32*, i32*, i32* }* [[TMP0]], i32 0, i32 1
|
|
|
|
|
; CHECK2-NEXT: [[LOADGEP_A_ADDR:%.*]] = load i32*, i32** [[GEP_A_ADDR]], align 8
|
|
|
|
|
; CHECK2-NEXT: [[GEP_ADD_SEQ_OUTPUT_ALLOC:%.*]] = getelementptr { i32*, i32*, i32* }, { i32*, i32*, i32* }* [[TMP0]], i32 0, i32 1
|
|
|
|
|
; CHECK2-NEXT: [[GEP_ADD_SEQ_OUTPUT_ALLOC:%.*]] = getelementptr { i32*, i32*, i32*, i32* }, { i32*, i32*, i32*, i32* }* [[TMP0]], i32 0, i32 2
|
|
|
|
|
; CHECK2-NEXT: [[LOADGEP_ADD_SEQ_OUTPUT_ALLOC:%.*]] = load i32*, i32** [[GEP_ADD_SEQ_OUTPUT_ALLOC]], align 8
|
|
|
|
|
; CHECK2-NEXT: [[GEP_ADD1_SEQ_OUTPUT_ALLOC:%.*]] = getelementptr { i32*, i32*, i32* }, { i32*, i32*, i32* }* [[TMP0]], i32 0, i32 2
|
|
|
|
|
; CHECK2-NEXT: [[GEP_ADD1_SEQ_OUTPUT_ALLOC:%.*]] = getelementptr { i32*, i32*, i32*, i32* }, { i32*, i32*, i32*, i32* }* [[TMP0]], i32 0, i32 3
|
|
|
|
|
; CHECK2-NEXT: [[LOADGEP_ADD1_SEQ_OUTPUT_ALLOC:%.*]] = load i32*, i32** [[GEP_ADD1_SEQ_OUTPUT_ALLOC]], align 8
|
|
|
|
|
; CHECK2-NEXT: [[TID_ADDR_LOCAL:%.*]] = alloca i32, align 4
|
|
|
|
|
; CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TID_ADDR]], align 4
|
|
|
|
|
; CHECK2-NEXT: store i32 [[TMP1]], i32* [[TID_ADDR_LOCAL]], align 4
|
|
|
|
|
; CHECK2-NEXT: [[TID:%.*]] = load i32, i32* [[TID_ADDR_LOCAL]], align 4
|
|
|
|
|
; CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[LOADGEP_A_RELOADED]], align 4
|
|
|
|
|
; CHECK2-NEXT: br label [[OMP_PAR_REGION:%.*]]
|
|
|
|
|
; CHECK2: omp.par.region:
|
|
|
|
|
; CHECK2-NEXT: br label [[OMP_PAR_MERGED:%.*]]
|
|
|
|
@ -6809,9 +6856,9 @@ entry:
|
|
|
|
|
; CHECK2-NEXT: [[OMP_GLOBAL_THREAD_NUM2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
|
|
|
|
|
; CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB3]], i32 [[OMP_GLOBAL_THREAD_NUM2]])
|
|
|
|
|
; CHECK2-NEXT: [[OMP_GLOBAL_THREAD_NUM:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
|
|
|
|
|
; CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB2]], i32 [[OMP_GLOBAL_THREAD_NUM]])
|
|
|
|
|
; CHECK2-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
|
|
|
|
|
; CHECK2-NEXT: br i1 [[TMP3]], label [[OMP_REGION_BODY:%.*]], label [[OMP_REGION_END:%.*]]
|
|
|
|
|
; CHECK2-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB2]], i32 [[OMP_GLOBAL_THREAD_NUM]])
|
|
|
|
|
; CHECK2-NEXT: [[TMP4:%.*]] = icmp ne i32 [[TMP3]], 0
|
|
|
|
|
; CHECK2-NEXT: br i1 [[TMP4]], label [[OMP_REGION_BODY:%.*]], label [[OMP_REGION_END:%.*]]
|
|
|
|
|
; CHECK2: omp_region.end:
|
|
|
|
|
; CHECK2-NEXT: [[OMP_GLOBAL_THREAD_NUM1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
|
|
|
|
|
; CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB3]], i32 [[OMP_GLOBAL_THREAD_NUM1]])
|
|
|
|
@ -6821,9 +6868,9 @@ entry:
|
|
|
|
|
; CHECK2-NEXT: [[OMP_GLOBAL_THREAD_NUM4:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
|
|
|
|
|
; CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB3]], i32 [[OMP_GLOBAL_THREAD_NUM4]])
|
|
|
|
|
; CHECK2-NEXT: [[OMP_GLOBAL_THREAD_NUM3:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
|
|
|
|
|
; CHECK2-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB2]], i32 [[OMP_GLOBAL_THREAD_NUM3]])
|
|
|
|
|
; CHECK2-NEXT: [[TMP5:%.*]] = icmp ne i32 [[TMP4]], 0
|
|
|
|
|
; CHECK2-NEXT: br i1 [[TMP5]], label [[OMP_REGION_BODY5:%.*]], label [[OMP_REGION_END4:%.*]]
|
|
|
|
|
; CHECK2-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB2]], i32 [[OMP_GLOBAL_THREAD_NUM3]])
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; CHECK2-NEXT: [[TMP6:%.*]] = icmp ne i32 [[TMP5]], 0
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; CHECK2-NEXT: br i1 [[TMP6]], label [[OMP_REGION_BODY5:%.*]], label [[OMP_REGION_END4:%.*]]
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; CHECK2: omp_region.end4:
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; CHECK2-NEXT: [[OMP_GLOBAL_THREAD_NUM6:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
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; CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB3]], i32 [[OMP_GLOBAL_THREAD_NUM6]])
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@ -6840,9 +6887,8 @@ entry:
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; CHECK2: omp_region.body5:
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; CHECK2-NEXT: br label [[SEQ_PAR_MERGED2:%.*]]
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; CHECK2: seq.par.merged2:
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; CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[LOADGEP_A_ADDR]], align 4
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; CHECK2-NEXT: [[ADD_SEQ_OUTPUT_LOAD:%.*]] = load i32, i32* [[LOADGEP_ADD_SEQ_OUTPUT_ALLOC]], align 4
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; CHECK2-NEXT: [[ADD1:%.*]] = add nsw i32 [[ADD_SEQ_OUTPUT_LOAD]], [[TMP6]]
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; CHECK2-NEXT: [[ADD1:%.*]] = add nsw i32 [[ADD_SEQ_OUTPUT_LOAD]], [[TMP2]]
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; CHECK2-NEXT: store i32 [[ADD1]], i32* [[LOADGEP_ADD1_SEQ_OUTPUT_ALLOC]], align 4
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; CHECK2-NEXT: br label [[OMP_PAR_MERGED_SPLIT_SPLIT_SPLIT:%.*]]
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; CHECK2: omp.par.merged.split.split.split:
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@ -6853,8 +6899,7 @@ entry:
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; CHECK2: omp_region.body:
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; CHECK2-NEXT: br label [[SEQ_PAR_MERGED:%.*]]
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; CHECK2: seq.par.merged:
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; CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[LOADGEP_A_ADDR]], align 4
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; CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP7]], 1
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; CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], 1
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; CHECK2-NEXT: store i32 [[ADD]], i32* [[LOADGEP_ADD_SEQ_OUTPUT_ALLOC]], align 4
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; CHECK2-NEXT: br label [[OMP_PAR_MERGED_SPLIT:%.*]]
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; CHECK2: omp.par.merged.split:
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@ -6971,8 +7016,7 @@ entry:
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; CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* noundef nonnull align 8 dereferenceable(24) @[[GLOB1]])
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; CHECK2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
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; CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* noundef nonnull align 8 dereferenceable(24) @[[GLOB1]], i32 noundef 1, void (i32*, i32*, ...)* noundef bitcast (void (i32*, i32*, i32*)* @.omp_outlined..34 to void (i32*, i32*, ...)*), i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A_ADDR]])
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; CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
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; CHECK2-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* noundef nonnull align 8 dereferenceable(24) @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]])
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; CHECK2-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* noundef nonnull align 8 dereferenceable(24) @[[GLOB1]], i32 [[TMP0]], i32 [[A]])
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; CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* noundef nonnull align 8 dereferenceable(24) @[[GLOB1]], i32 noundef 1, void (i32*, i32*, ...)* noundef bitcast (void (i32*, i32*, i32*)* @.omp_outlined..35 to void (i32*, i32*, ...)*), i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A_ADDR]])
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; CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* noundef nonnull align 8 dereferenceable(24) @[[GLOB1]], i32 noundef 1, void (i32*, i32*, ...)* noundef bitcast (void (i32*, i32*, i32*)* @.omp_outlined..36 to void (i32*, i32*, ...)*), i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A_ADDR]])
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; CHECK2-NEXT: ret void
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