forked from OSchip/llvm-project
Refactor rewinding code for finding the first terminator of a basic
block into MachineBasicBlock::getFirstTerminator(). This also fixes a bug in the implementation of the above in both RegAllocLocal and InstrSched, where instructions where added after the terminator if the basic block's only instruction was a terminator (it shouldn't matter for RegAllocLocal since this case never occurs in practice). llvm-svn: 11748
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@ -95,6 +95,11 @@ public:
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reverse_iterator rend () { return Insts.rend(); }
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const_reverse_iterator rend () const { return Insts.rend(); }
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/// getFirstTerminator - returns an iterator to the first terminator
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/// instruction of this basic block. If a terminator does not exist,
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/// it returns end()
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iterator getFirstTerminator();
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void push_back(MachineInstr *MI) { Insts.push_back(MI); }
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template<typename IT>
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void insert(iterator I, IT S, IT E) { Insts.insert(I, S, E); }
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@ -15,6 +15,8 @@
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#include "llvm/BasicBlock.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include "Support/LeakDetector.h"
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using namespace llvm;
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@ -56,6 +58,16 @@ void ilist_traits<MachineInstr>::transferNodesFromList(
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first->parent = toList.parent;
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}
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MachineBasicBlock::iterator MachineBasicBlock::getFirstTerminator()
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{
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const TargetInstrInfo& TII = MachineFunction::get(
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getBasicBlock()->getParent()).getTarget().getInstrInfo();
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iterator I = end();
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while (I != begin() && TII.isTerminatorInstr((--I)->getOpcode()));
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if (I != end() && !TII.isTerminatorInstr(I->getOpcode())) ++I;
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return I;
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}
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void MachineBasicBlock::dump() const
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{
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print(std::cerr);
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@ -143,22 +143,7 @@ bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) {
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// source path the PHI.
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MachineBasicBlock &opBlock = *MI->getOperand(i).getMachineBasicBlock();
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// Figure out where to insert the copy, which is at the end of the
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// predecessor basic block, but before any terminator/branch
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// instructions...
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MachineBasicBlock::iterator I = opBlock.end();
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if (I != opBlock.begin()) { // Handle empty blocks
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--I;
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// must backtrack over ALL the branches in the previous block
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while (MII.isTerminatorInstr(I->getOpcode()) &&
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I != opBlock.begin())
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--I;
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// move back to the first branch instruction so new instructions
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// are inserted right in front of it and not in front of a non-branch
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if (!MII.isTerminatorInstr(I->getOpcode()))
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++I;
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}
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MachineBasicBlock::iterator I = opBlock.getFirstTerminator();
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// Check to make sure we haven't already emitted the copy for this block.
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// This can happen because PHI nodes may have multiple entries for the
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@ -649,11 +649,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
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}
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}
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// Rewind the iterator to point to the first flow control instruction...
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const TargetInstrInfo &TII = TM->getInstrInfo();
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MI = MBB.end();
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while (MI != MBB.begin() && TII.isTerminatorInstr((--MI)->getOpcode()));
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if (MI != MBB.end()) ++MI;
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MI = MBB.getFirstTerminator();
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// Spill all physical registers holding virtual registers now.
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for (unsigned i = 0, e = RegInfo->getNumRegs(); i != e; ++i)
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@ -679,7 +679,6 @@ static bool RequiresFPRegKill(const BasicBlock *BB) {
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//
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void ISel::InsertFPRegKills() {
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SSARegMap &RegMap = *F->getSSARegMap();
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const TargetInstrInfo &TII = TM.getInstrInfo();
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for (MachineFunction::iterator BB = F->begin(), E = F->end(); BB != E; ++BB) {
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for (MachineBasicBlock::iterator I = BB->begin(), E = BB->end(); I!=E; ++I)
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@ -709,11 +708,7 @@ void ISel::InsertFPRegKills() {
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// it's not an unwind/return), insert the FP_REG_KILL instruction.
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if (BB->getBasicBlock()->getTerminator()->getNumSuccessors() &&
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RequiresFPRegKill(BB->getBasicBlock())) {
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// Rewind past any terminator instructions that might exist.
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MachineBasicBlock::iterator I = BB->end();
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while (I != BB->begin() && TII.isTerminatorInstr((--I)->getOpcode()));
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if (I != BB->end()) ++I;
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BMI(BB, I, X86::FP_REG_KILL, 0);
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BMI(BB, BB->getFirstTerminator(), X86::FP_REG_KILL, 0);
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++NumFPKill;
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}
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}
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