forked from OSchip/llvm-project
[X86] Teach computeKnownBitsForTargetNode that the upper half of X86ISD::MOVQ2DQ is all zero.
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@ -33402,6 +33402,12 @@ void X86TargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
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}
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break;
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}
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case X86ISD::MOVQ2DQ: {
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// Move from MMX to XMM. Upper half of XMM should be 0.
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if (DemandedElts.countTrailingZeros() >= (NumElts / 2))
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Known.setAllZero();
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break;
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}
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}
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// Handle target shuffles.
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@ -298,7 +298,6 @@ define <4 x float> @sitofp_v2i32_v2f32(<1 x i64>*) nounwind {
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; X86-NEXT: movq (%eax), %mm0
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; X86-NEXT: paddd %mm0, %mm0
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; X86-NEXT: movq2dq %mm0, %xmm0
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; X86-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero
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; X86-NEXT: cvtdq2ps %xmm0, %xmm0
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; X86-NEXT: retl
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;
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@ -307,7 +306,6 @@ define <4 x float> @sitofp_v2i32_v2f32(<1 x i64>*) nounwind {
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; X64-NEXT: movq (%rdi), %mm0
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; X64-NEXT: paddd %mm0, %mm0
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; X64-NEXT: movq2dq %mm0, %xmm0
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; X64-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero
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; X64-NEXT: cvtdq2ps %xmm0, %xmm0
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; X64-NEXT: retq
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%2 = bitcast <1 x i64>* %0 to x86_mmx*
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@ -8,12 +8,7 @@
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define x86_mmx @mmx_movzl(x86_mmx %x) nounwind {
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; X32-LABEL: mmx_movzl:
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; X32: ## %bb.0:
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; X32-NEXT: movq2dq %mm0, %xmm0
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; X32-NEXT: movl $32, %eax
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; X32-NEXT: pinsrd $0, %eax, %xmm0
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; X32-NEXT: pxor %xmm1, %xmm1
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; X32-NEXT: pblendw {{.*#+}} xmm1 = xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]
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; X32-NEXT: movdq2q %xmm1, %mm0
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; X32-NEXT: movq LCPI0_0, %mm0
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; X32-NEXT: retl
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;
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; X64-LABEL: mmx_movzl:
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