[X86] Teach computeKnownBitsForTargetNode that the upper half of X86ISD::MOVQ2DQ is all zero.

This commit is contained in:
Craig Topper 2020-05-30 17:04:56 -07:00
parent 1ecf39d607
commit af1accdd86
3 changed files with 7 additions and 8 deletions

View File

@ -33402,6 +33402,12 @@ void X86TargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
}
break;
}
case X86ISD::MOVQ2DQ: {
// Move from MMX to XMM. Upper half of XMM should be 0.
if (DemandedElts.countTrailingZeros() >= (NumElts / 2))
Known.setAllZero();
break;
}
}
// Handle target shuffles.

View File

@ -298,7 +298,6 @@ define <4 x float> @sitofp_v2i32_v2f32(<1 x i64>*) nounwind {
; X86-NEXT: movq (%eax), %mm0
; X86-NEXT: paddd %mm0, %mm0
; X86-NEXT: movq2dq %mm0, %xmm0
; X86-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero
; X86-NEXT: cvtdq2ps %xmm0, %xmm0
; X86-NEXT: retl
;
@ -307,7 +306,6 @@ define <4 x float> @sitofp_v2i32_v2f32(<1 x i64>*) nounwind {
; X64-NEXT: movq (%rdi), %mm0
; X64-NEXT: paddd %mm0, %mm0
; X64-NEXT: movq2dq %mm0, %xmm0
; X64-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero
; X64-NEXT: cvtdq2ps %xmm0, %xmm0
; X64-NEXT: retq
%2 = bitcast <1 x i64>* %0 to x86_mmx*

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@ -8,12 +8,7 @@
define x86_mmx @mmx_movzl(x86_mmx %x) nounwind {
; X32-LABEL: mmx_movzl:
; X32: ## %bb.0:
; X32-NEXT: movq2dq %mm0, %xmm0
; X32-NEXT: movl $32, %eax
; X32-NEXT: pinsrd $0, %eax, %xmm0
; X32-NEXT: pxor %xmm1, %xmm1
; X32-NEXT: pblendw {{.*#+}} xmm1 = xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]
; X32-NEXT: movdq2q %xmm1, %mm0
; X32-NEXT: movq LCPI0_0, %mm0
; X32-NEXT: retl
;
; X64-LABEL: mmx_movzl: