maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

[Alignment] Move OffsetToAlignment to Alignment.h 

Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet, JDevlieghere, alexshap, rupprecht, jhenderson

Subscribers: sdardis, nemanjai, hiraditya, kbarton, jakehehrlich, jrtc27, MaskRay, atanasyan, jsji, seiya, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D67499

llvm-svn: 371742
This commit is contained in:
Guillaume Chatelet 2019-09-12 15:20:36 +00:00
parent 0866dbfa1a
commit af11cc7eb5
20 changed files with 69 additions and 53 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
clang/lib/AST/DeclBase.cpp
View File

@ -100,7 +100,7 @@ void *Decl::operator new(std::size_t Size, const ASTContext &Ctx,
// Ensure required alignment of the resulting object by adding extra
// padding at the start if required.
size_t ExtraAlign =
llvm::OffsetToAlignment(sizeof(Module *), alignof(Decl));
llvm::offsetToAlignment(sizeof(Module *), llvm::Align(alignof(Decl)));
auto *Buffer = reinterpret_cast<char *>(
::operator new(ExtraAlign + sizeof(Module *) + Size + Extra, Ctx));
Buffer += ExtraAlign;

6
llvm/include/llvm/Support/Alignment.h
View File

@ -133,6 +133,12 @@ inline uint64_t alignTo(uint64_t Size, MaybeAlign A) {
return A ? alignTo(Size, A.getValue()) : Size;
}
/// Returns the offset to the next integer (mod 2**64) that is greater than
/// or equal to \p Value and is a multiple of \p Align.
inline uint64_t offsetToAlignment(uint64_t Value, llvm::Align Align) {
return alignTo(Value, Align) - Value;
}
/// Returns the log2 of the alignment.
inline unsigned Log2(Align A) { return A.ShiftValue; }

7
llvm/include/llvm/Support/MathExtras.h
View File

@ -712,13 +712,6 @@ inline uint64_t alignDown(uint64_t Value, uint64_t Align, uint64_t Skew = 0) {
return (Value - Skew) / Align * Align + Skew;
}
/// Returns the offset to the next integer (mod 2**64) that is greater than
/// or equal to \p Value and is a multiple of \p Align. \p Align must be
/// non-zero.
inline uint64_t OffsetToAlignment(uint64_t Value, uint64_t Align) {
return alignTo(Value, Align) - Value;
}
/// Sign-extend the number in the bottom B bits of X to a 32-bit integer.
/// Requires 0 < B <= 32.
template <unsigned B> constexpr inline int32_t SignExtend32(uint32_t X) {

4
llvm/include/llvm/Support/OnDiskHashTable.h
View File

@ -13,6 +13,7 @@
#ifndef LLVM_SUPPORT_ONDISKHASHTABLE_H
#define LLVM_SUPPORT_ONDISKHASHTABLE_H
#include "llvm/Support/Alignment.h"
#include "llvm/Support/Allocator.h"
#include "llvm/Support/DataTypes.h"
#include "llvm/Support/EndianStream.h"
@ -207,7 +208,8 @@ public:
// Pad with zeros so that we can start the hashtable at an aligned address.
offset_type TableOff = Out.tell();
uint64_t N = llvm::OffsetToAlignment(TableOff, alignof(offset_type));
uint64_t N =
llvm::offsetToAlignment(TableOff, llvm::Align(alignof(offset_type)));
TableOff += N;
while (N--)
LE.write<uint8_t>(0);

4
llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
View File

@ -2555,8 +2555,8 @@ void DwarfDebug::emitDebugARanges() {
unsigned TupleSize = PtrSize * 2;
// 7.20 in the Dwarf specs requires the table to be aligned to a tuple.
unsigned Padding =
OffsetToAlignment(sizeof(int32_t) + ContentSize, TupleSize);
unsigned Padding = offsetToAlignment(sizeof(int32_t) + ContentSize,
llvm::Align(TupleSize));
ContentSize += Padding;
ContentSize += (List.size() + 1) * TupleSize;

4
llvm/lib/CodeGen/BranchRelaxation.cpp
View File

@ -71,11 +71,11 @@ class BranchRelaxation : public MachineFunctionPass {
const llvm::Align ParentAlign = MBB.getParent()->getAlignment();
if (Align <= ParentAlign)
return PO + OffsetToAlignment(PO, Align.value());
return PO + offsetToAlignment(PO, Align);
// The alignment of this MBB is larger than the function's alignment, so we
// can't tell whether or not it will insert nops. Assume that it will.
return PO + Align.value() + OffsetToAlignment(PO, Align.value());
return PO + Align.value() + offsetToAlignment(PO, Align);
}
};

4
llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp
View File

@ -17,6 +17,7 @@
#include "RuntimeDyldMachO.h"
#include "llvm/Object/COFF.h"
#include "llvm/Object/ELFObjectFile.h"
#include "llvm/Support/Alignment.h"
#include "llvm/Support/MSVCErrorWorkarounds.h"
#include "llvm/Support/ManagedStatic.h"
#include "llvm/Support/MathExtras.h"
@ -737,7 +738,8 @@ Error RuntimeDyldImpl::emitCommonSymbols(const ObjectFile &Obj,
return NameOrErr.takeError();
if (Align) {
// This symbol has an alignment requirement.
uint64_t AlignOffset = OffsetToAlignment((uint64_t)Addr, Align);
uint64_t AlignOffset =
offsetToAlignment((uint64_t)Addr, llvm::Align(Align));
Addr += AlignOffset;
Offset += AlignOffset;
}

3
llvm/lib/MC/ELFObjectWriter.cpp
View File

@ -36,6 +36,7 @@
#include "llvm/MC/MCSymbolELF.h"
#include "llvm/MC/MCValue.h"
#include "llvm/MC/StringTableBuilder.h"
#include "llvm/Support/Alignment.h"
#include "llvm/Support/Allocator.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/Compression.h"
@ -336,7 +337,7 @@ public:
} // end anonymous namespace
void ELFWriter::align(unsigned Alignment) {
uint64_t Padding = OffsetToAlignment(W.OS.tell(), Alignment);
uint64_t Padding = offsetToAlignment(W.OS.tell(), llvm::Align(Alignment));
W.OS.write_zeros(Padding);
}

3
llvm/lib/MC/MCAssembler.cpp
View File

@ -30,6 +30,7 @@
#include "llvm/MC/MCSectionELF.h"
#include "llvm/MC/MCSymbol.h"
#include "llvm/MC/MCValue.h"
#include "llvm/Support/Alignment.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
@ -321,7 +322,7 @@ uint64_t MCAssembler::computeFragmentSize(const MCAsmLayout &Layout,
case MCFragment::FT_Align: {
const MCAlignFragment &AF = cast<MCAlignFragment>(F);
unsigned Offset = Layout.getFragmentOffset(&AF);
unsigned Size = OffsetToAlignment(Offset, AF.getAlignment());
unsigned Size = offsetToAlignment(Offset, llvm::Align(AF.getAlignment()));
// Insert extra Nops for code alignment if the target define
// shouldInsertExtraNopBytesForCodeAlign target hook.

12
llvm/lib/MC/MachObjectWriter.cpp
View File

@ -25,6 +25,7 @@
#include "llvm/MC/MCSymbol.h"
#include "llvm/MC/MCSymbolMachO.h"
#include "llvm/MC/MCValue.h"
#include "llvm/Support/Alignment.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
@ -126,7 +127,7 @@ uint64_t MachObjectWriter::getPaddingSize(const MCSection *Sec,
const MCSection &NextSec = *Layout.getSectionOrder()[Next];
if (NextSec.isVirtualSection())
return 0;
return OffsetToAlignment(EndAddr, NextSec.getAlignment());
return offsetToAlignment(EndAddr, llvm::Align(NextSec.getAlignment()));
}
void MachObjectWriter::writeHeader(MachO::HeaderFileType Type,
@ -444,7 +445,8 @@ void MachObjectWriter::writeLinkerOptionsLoadCommand(
}
// Pad to a multiple of the pointer size.
W.OS.write_zeros(OffsetToAlignment(BytesWritten, is64Bit() ? 8 : 4));
W.OS.write_zeros(offsetToAlignment(BytesWritten, is64Bit() ? llvm::Align(8)
: llvm::Align(4)));
assert(W.OS.tell() - Start == Size);
}
@ -832,7 +834,8 @@ uint64_t MachObjectWriter::writeObject(MCAssembler &Asm,
// The section data is padded to 4 bytes.
//
// FIXME: Is this machine dependent?
unsigned SectionDataPadding = OffsetToAlignment(SectionDataFileSize, 4);
unsigned SectionDataPadding =
offsetToAlignment(SectionDataFileSize, llvm::Align(4));
SectionDataFileSize += SectionDataPadding;
// Write the prolog, starting with the header and load command...
@ -997,7 +1000,8 @@ uint64_t MachObjectWriter::writeObject(MCAssembler &Asm,
#endif
Asm.getLOHContainer().emit(*this, Layout);
// Pad to a multiple of the pointer size.
W.OS.write_zeros(OffsetToAlignment(LOHRawSize, is64Bit() ? 8 : 4));
W.OS.write_zeros(offsetToAlignment(LOHRawSize, is64Bit() ? llvm::Align(8)
: llvm::Align(4)));
assert(W.OS.tell() - Start == LOHSize);
}

14
llvm/lib/Object/ArchiveWriter.cpp
View File

@ -19,6 +19,7 @@
#include "llvm/Object/Error.h"
#include "llvm/Object/ObjectFile.h"
#include "llvm/Object/SymbolicFile.h"
#include "llvm/Support/Alignment.h"
#include "llvm/Support/EndianStream.h"
#include "llvm/Support/Errc.h"
#include "llvm/Support/ErrorHandling.h"
@ -176,7 +177,7 @@ printBSDMemberHeader(raw_ostream &Out, uint64_t Pos, StringRef Name,
unsigned UID, unsigned GID, unsigned Perms, uint64_t Size) {
uint64_t PosAfterHeader = Pos + 60 + Name.size();
// Pad so that even 64 bit object files are aligned.
unsigned Pad = OffsetToAlignment(PosAfterHeader, 8);
unsigned Pad = offsetToAlignment(PosAfterHeader, llvm::Align(8));
unsigned NameWithPadding = Name.size() + Pad;
printWithSpacePadding(Out, Twine("#1/") + Twine(NameWithPadding), 16);
printRestOfMemberHeader(Out, ModTime, UID, GID, Perms,
@ -243,7 +244,7 @@ struct MemberData {
static MemberData computeStringTable(StringRef Names) {
unsigned Size = Names.size();
unsigned Pad = OffsetToAlignment(Size, 2);
unsigned Pad = offsetToAlignment(Size, llvm::Align(2));
std::string Header;
raw_string_ostream Out(Header);
printWithSpacePadding(Out, "//", 48);
@ -307,8 +308,8 @@ static void writeSymbolTable(raw_ostream &Out, object::Archive::Kind Kind,
// least 4-byte aligned for 32-bit content. Opt for the larger encoding
// uniformly.
// We do this for all bsd formats because it simplifies aligning members.
unsigned Alignment = isBSDLike(Kind) ? 8 : 2;
unsigned Pad = OffsetToAlignment(Size, Alignment);
const llvm::Align Alignment(isBSDLike(Kind) ? 8 : 2);
unsigned Pad = offsetToAlignment(Size, Alignment);
Size += Pad;
if (isBSDLike(Kind)) {
@ -464,8 +465,9 @@ computeMemberData(raw_ostream &StringTable, raw_ostream &SymNames,
// uniformly. This matches the behaviour with cctools and ensures that ld64
// is happy with archives that we generate.
unsigned MemberPadding =
isDarwin(Kind) ? OffsetToAlignment(Data.size(), 8) : 0;
unsigned TailPadding = OffsetToAlignment(Data.size() + MemberPadding, 2);
isDarwin(Kind) ? offsetToAlignment(Data.size(), llvm::Align(8)) : 0;
unsigned TailPadding =
offsetToAlignment(Data.size() + MemberPadding, llvm::Align(2));
StringRef Padding = StringRef(PaddingData, MemberPadding + TailPadding);
sys::TimePoint<std::chrono::seconds> ModTime;

8
llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
View File

@ -1016,14 +1016,14 @@ bool ARMConstantIslands::isWaterInRange(unsigned UserOffset,
BBInfoVector &BBInfo = BBUtils->getBBInfo();
unsigned CPELogAlign = getCPELogAlign(U.CPEMI);
unsigned CPEOffset = BBInfo[Water->getNumber()].postOffset(CPELogAlign);
unsigned NextBlockOffset, NextBlockLogAlignment;
unsigned NextBlockOffset;
llvm::Align NextBlockAlignment;
MachineFunction::const_iterator NextBlock = Water->getIterator();
if (++NextBlock == MF->end()) {
NextBlockOffset = BBInfo[Water->getNumber()].postOffset();
NextBlockLogAlignment = 0;
} else {
NextBlockOffset = BBInfo[NextBlock->getNumber()].Offset;
NextBlockLogAlignment = NextBlock->getLogAlignment();
NextBlockAlignment = NextBlock->getAlignment();
}
unsigned Size = U.CPEMI->getOperand(2).getImm();
unsigned CPEEnd = CPEOffset + Size;
@ -1035,7 +1035,7 @@ bool ARMConstantIslands::isWaterInRange(unsigned UserOffset,
Growth = CPEEnd - NextBlockOffset;
// Compute the padding that would go at the end of the CPE to align the next
// block.
Growth += OffsetToAlignment(CPEEnd, 1ULL << NextBlockLogAlignment);
Growth += offsetToAlignment(CPEEnd, NextBlockAlignment);
// If the CPE is to be inserted before the instruction, that will raise
// the offset of the instruction. Also account for unknown alignment padding

21
llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
View File

@ -39,6 +39,7 @@
#include "llvm/MC/MCSymbolELF.h"
#include "llvm/MC/MCValue.h"
#include "llvm/MC/SubtargetFeature.h"
#include "llvm/Support/Alignment.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Compiler.h"
@ -1804,8 +1805,9 @@ bool MipsAsmParser::processInstruction(MCInst &Inst, SMLoc IDLoc,
break; // We'll deal with this situation later on when applying fixups.
if (!isIntN(inMicroMipsMode() ? 17 : 18, Offset.getImm()))
return Error(IDLoc, "branch target out of range");
if (OffsetToAlignment(Offset.getImm(),
1LL << (inMicroMipsMode() ? 1 : 2)))
if (offsetToAlignment(
Offset.getImm(),
(inMicroMipsMode() ? llvm::Align(2) : llvm::Align(4))))
return Error(IDLoc, "branch to misaligned address");
break;
case Mips::BGEZ:
@ -1834,8 +1836,9 @@ bool MipsAsmParser::processInstruction(MCInst &Inst, SMLoc IDLoc,
break; // We'll deal with this situation later on when applying fixups.
if (!isIntN(inMicroMipsMode() ? 17 : 18, Offset.getImm()))
return Error(IDLoc, "branch target out of range");
if (OffsetToAlignment(Offset.getImm(),
1LL << (inMicroMipsMode() ? 1 : 2)))
if (offsetToAlignment(
Offset.getImm(),
(inMicroMipsMode() ? llvm::Align(2) : llvm::Align(4))))
return Error(IDLoc, "branch to misaligned address");
break;
case Mips::BGEC: case Mips::BGEC_MMR6:
@ -1850,7 +1853,7 @@ bool MipsAsmParser::processInstruction(MCInst &Inst, SMLoc IDLoc,
break; // We'll deal with this situation later on when applying fixups.
if (!isIntN(18, Offset.getImm()))
return Error(IDLoc, "branch target out of range");
if (OffsetToAlignment(Offset.getImm(), 1LL << 2))
if (offsetToAlignment(Offset.getImm(), llvm::Align(4)))
return Error(IDLoc, "branch to misaligned address");
break;
case Mips::BLEZC: case Mips::BLEZC_MMR6:
@ -1863,7 +1866,7 @@ bool MipsAsmParser::processInstruction(MCInst &Inst, SMLoc IDLoc,
break; // We'll deal with this situation later on when applying fixups.
if (!isIntN(18, Offset.getImm()))
return Error(IDLoc, "branch target out of range");
if (OffsetToAlignment(Offset.getImm(), 1LL << 2))
if (offsetToAlignment(Offset.getImm(), llvm::Align(4)))
return Error(IDLoc, "branch to misaligned address");
break;
case Mips::BEQZC: case Mips::BEQZC_MMR6:
@ -1874,7 +1877,7 @@ bool MipsAsmParser::processInstruction(MCInst &Inst, SMLoc IDLoc,
break; // We'll deal with this situation later on when applying fixups.
if (!isIntN(23, Offset.getImm()))
return Error(IDLoc, "branch target out of range");
if (OffsetToAlignment(Offset.getImm(), 1LL << 2))
if (offsetToAlignment(Offset.getImm(), llvm::Align(4)))
return Error(IDLoc, "branch to misaligned address");
break;
case Mips::BEQZ16_MM:
@ -1887,7 +1890,7 @@ bool MipsAsmParser::processInstruction(MCInst &Inst, SMLoc IDLoc,
break; // We'll deal with this situation later on when applying fixups.
if (!isInt<8>(Offset.getImm()))
return Error(IDLoc, "branch target out of range");
if (OffsetToAlignment(Offset.getImm(), 2LL))
if (offsetToAlignment(Offset.getImm(), llvm::Align(2)))
return Error(IDLoc, "branch to misaligned address");
break;
}
@ -3494,7 +3497,7 @@ bool MipsAsmParser::expandUncondBranchMMPseudo(MCInst &Inst, SMLoc IDLoc,
} else {
if (!isInt<17>(Offset.getImm()))
return Error(IDLoc, "branch target out of range");
if (OffsetToAlignment(Offset.getImm(), 1LL << 1))
if (offsetToAlignment(Offset.getImm(), llvm::Align(2)))
return Error(IDLoc, "branch to misaligned address");
Inst.clear();
Inst.setOpcode(Mips::BEQ_MM);

9
llvm/lib/Target/Mips/MipsConstantIslandPass.cpp
View File

@ -943,14 +943,15 @@ bool MipsConstantIslands::isWaterInRange(unsigned UserOffset,
unsigned &Growth) {
unsigned CPELogAlign = getCPELogAlign(*U.CPEMI);
unsigned CPEOffset = BBInfo[Water->getNumber()].postOffset(CPELogAlign);
unsigned NextBlockOffset, NextBlockLogAlignment;
unsigned NextBlockOffset;
llvm::Align NextBlockAlignment;
MachineFunction::const_iterator NextBlock = ++Water->getIterator();
if (NextBlock == MF->end()) {
NextBlockOffset = BBInfo[Water->getNumber()].postOffset();
NextBlockLogAlignment = 0;
NextBlockAlignment = llvm::Align();
} else {
NextBlockOffset = BBInfo[NextBlock->getNumber()].Offset;
NextBlockLogAlignment = NextBlock->getLogAlignment();
NextBlockAlignment = NextBlock->getAlignment();
}
unsigned Size = U.CPEMI->getOperand(2).getImm();
unsigned CPEEnd = CPEOffset + Size;
@ -962,7 +963,7 @@ bool MipsConstantIslands::isWaterInRange(unsigned UserOffset,
Growth = CPEEnd - NextBlockOffset;
// Compute the padding that would go at the end of the CPE to align the next
// block.
Growth += OffsetToAlignment(CPEEnd, 1ULL << NextBlockLogAlignment);
Growth += offsetToAlignment(CPEEnd, NextBlockAlignment);
// If the CPE is to be inserted before the instruction, that will raise
// the offset of the instruction. Also account for unknown alignment padding

3
llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
View File

@ -247,7 +247,8 @@ bool MipsSEDAGToDAGISel::selectAddrFrameIndexOffset(
Base = Addr.getOperand(0);
// If base is a FI, additional offset calculation is done in
// eliminateFrameIndex, otherwise we need to check the alignment
if (OffsetToAlignment(CN->getZExtValue(), 1ull << ShiftAmount) != 0)
const llvm::Align Align(1ULL << ShiftAmount);
if (!isAligned(Align, CN->getZExtValue()))
return false;
}

6
llvm/lib/Target/Mips/MipsSERegisterInfo.cpp
View File

@ -212,11 +212,9 @@ void MipsSERegisterInfo::eliminateFI(MachineBasicBlock::iterator II,
// element size), otherwise it is a 16-bit signed immediate.
unsigned OffsetBitSize =
getLoadStoreOffsetSizeInBits(MI.getOpcode(), MI.getOperand(OpNo - 1));
unsigned OffsetAlign = getLoadStoreOffsetAlign(MI.getOpcode());
const llvm::Align OffsetAlign(getLoadStoreOffsetAlign(MI.getOpcode()));
if (OffsetBitSize < 16 && isInt<16>(Offset) &&
(!isIntN(OffsetBitSize, Offset) ||
OffsetToAlignment(Offset, OffsetAlign) != 0)) {
(!isIntN(OffsetBitSize, Offset) || !isAligned(OffsetAlign, Offset))) {
// If we have an offset that needs to fit into a signed n-bit immediate
// (where n < 16) and doesn't, but does fit into 16-bits then use an ADDiu
MachineBasicBlock &MBB = *MI.getParent();

4
llvm/lib/Target/PowerPC/PPCBranchSelector.cpp
View File

@ -88,13 +88,13 @@ unsigned PPCBSel::GetAlignmentAdjustment(MachineBasicBlock &MBB,
const llvm::Align ParentAlign = MBB.getParent()->getAlignment();
if (Align <= ParentAlign)
return OffsetToAlignment(Offset, Align.value());
return offsetToAlignment(Offset, Align);
// The alignment of this MBB is larger than the function's alignment, so we
// can't tell whether or not it will insert nops. Assume that it will.
if (FirstImpreciseBlock < 0)
FirstImpreciseBlock = MBB.getNumber();
return Align.value() + OffsetToAlignment(Offset, Align.value());
return Align.value() + offsetToAlignment(Offset, Align);
}
/// We need to be careful about the offset of the first block in the function

2
llvm/tools/dsymutil/DwarfStreamer.cpp
View File

@ -339,7 +339,7 @@ void DwarfStreamer::emitUnitRangesEntries(CompileUnit &Unit,
sizeof(int8_t); // Segment Size (in bytes)
unsigned TupleSize = AddressSize * 2;
unsigned Padding = OffsetToAlignment(HeaderSize, TupleSize);
unsigned Padding = offsetToAlignment(HeaderSize, llvm::Align(TupleSize));
Asm->EmitLabelDifference(EndLabel, BeginLabel, 4); // Arange length
Asm->OutStreamer->EmitLabel(BeginLabel);

3
llvm/tools/llvm-cov/TestingSupport.cpp
View File

@ -8,6 +8,7 @@
#include "llvm/Object/ObjectFile.h"
#include "llvm/ProfileData/InstrProf.h"
#include "llvm/Support/Alignment.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/LEB128.h"
#include "llvm/Support/raw_ostream.h"
@ -99,7 +100,7 @@ int convertForTestingMain(int argc, const char *argv[]) {
encodeULEB128(ProfileNamesAddress, OS);
OS << ProfileNamesData;
// Coverage mapping data is expected to have an alignment of 8.
for (unsigned Pad = OffsetToAlignment(OS.tell(), 8); Pad; --Pad)
for (unsigned Pad = offsetToAlignment(OS.tell(), llvm::Align(8)); Pad; --Pad)
OS.write(uint8_t(0));
OS << CoverageMappingData;

3
llvm/tools/llvm-objcopy/MachO/MachOLayoutBuilder.cpp
View File

@ -7,6 +7,7 @@
//===----------------------------------------------------------------------===//
#include "MachOLayoutBuilder.h"
#include "llvm/Support/Alignment.h"
#include "llvm/Support/Errc.h"
#include "llvm/Support/ErrorHandling.h"
@ -145,7 +146,7 @@ uint64_t MachOLayoutBuilder::layoutSegments() {
Sec.Offset = 0;
} else {
uint64_t PaddingSize =
OffsetToAlignment(SegFileSize, 1ull << Sec.Align);
offsetToAlignment(SegFileSize, llvm::Align(1ull << Sec.Align));
Sec.Offset = SegOffset + SegFileSize + PaddingSize;
Sec.Size = Sec.Content.size();
SegFileSize += PaddingSize + Sec.Size;