forked from OSchip/llvm-project
[IRBuilder][NFC] Clarify docs on fadd/fmul reductions
This patch aims to clear up any confusion in documentation for the fadd/fmul reduction creation APIs with regards to the sequential and unordered variations without changing the APIs themselves. The scalar accumulator value isn't only used for sequential reduction intrinsics so the impliciation to the contrary was dropped. Then I thought it useful to make clear that the API always creates a sequential reduction. And lastly a note to users on how it is possible to transform the resulting reduction into an unordered one. Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D107753
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@ -697,12 +697,16 @@ public:
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MDNode *TBAAStructTag = nullptr, MDNode *ScopeTag = nullptr,
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MDNode *NoAliasTag = nullptr);
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/// Create a vector fadd reduction intrinsic of the source vector.
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/// The first parameter is a scalar accumulator value for ordered reductions.
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/// Create a sequential vector fadd reduction intrinsic of the source vector.
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/// The first parameter is a scalar accumulator value. An unordered reduction
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/// can be created by adding the reassoc fast-math flag to the resulting
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/// sequential reduction.
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CallInst *CreateFAddReduce(Value *Acc, Value *Src);
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/// Create a vector fmul reduction intrinsic of the source vector.
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/// The first parameter is a scalar accumulator value for ordered reductions.
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/// Create a sequential vector fmul reduction intrinsic of the source vector.
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/// The first parameter is a scalar accumulator value. An unordered reduction
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/// can be created by adding the reassoc fast-math flag to the resulting
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/// sequential reduction.
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CallInst *CreateFMulReduce(Value *Acc, Value *Src);
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/// Create a vector int add reduction intrinsic of the source vector.
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