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Special case common branch patterns in breakLoopBackedge 

This special cases an unconditional latch and a conditional branch latch exit to improve codegen and test readability.  I am hoping to reuse this function in the runtime unroll code, but without this change, the test diffs are far too complex to assess.
This commit is contained in:
Philip Reames 2021-08-22 10:40:05 -07:00
parent 805fb1f6c1
commit aec08e8600
8 changed files with 72 additions and 109 deletions
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53
llvm/lib/Transforms/Utils/LoopUtils.cpp
View File

@ -710,21 +710,54 @@ void llvm::breakLoopBackedge(Loop *L, DominatorTree &DT, ScalarEvolution &SE,
SE.forgetLoop(L);
// Note: By splitting the backedge, and then explicitly making it unreachable
// we gracefully handle corner cases such as non-bottom tested loops and the
// like. We also have the benefit of being able to reuse existing well tested
// code. It might be worth special casing the common bottom tested case at
// some point to avoid code churn.
std::unique_ptr<MemorySSAUpdater> MSSAU;
if (MSSA)
MSSAU = std::make_unique<MemorySSAUpdater>(MSSA);
auto *BackedgeBB = SplitEdge(Latch, Header, &DT, &LI, MSSAU.get());
// Update the CFG and domtree. We chose to special case a couple of
// of common cases for code quality and test readability reasons.
[&]() -> void {
if (auto *BI = dyn_cast<BranchInst>(Latch->getTerminator())) {
if (!BI->isConditional()) {
DomTreeUpdater DTU(&DT, DomTreeUpdater::UpdateStrategy::Eager);
(void)changeToUnreachable(BI, /*PreserveLCSSA*/ true, &DTU,
MSSAU.get());
return;
}
DomTreeUpdater DTU(&DT, DomTreeUpdater::UpdateStrategy::Eager);
(void)changeToUnreachable(BackedgeBB->getTerminator(),
/*PreserveLCSSA*/ true, &DTU, MSSAU.get());
// Conditional latch/exit - note that latch can be shared by inner
// and outer loop so the other target doesn't need to an exit
if (L->isLoopExiting(Latch)) {
// TODO: Generalize ConstantFoldTerminator so that it can be used
// here without invalidating LCSSA. (Tricky case: header is an exit
// block of a preceeding sibling loop w/o dedicated exits.)
const unsigned ExitIdx = L->contains(BI->getSuccessor(0)) ? 1 : 0;
BasicBlock *ExitBB = BI->getSuccessor(ExitIdx);
DomTreeUpdater DTU(&DT, DomTreeUpdater::UpdateStrategy::Eager);
Header->removePredecessor(Latch, true);
IRBuilder<> Builder(BI);
auto *NewBI = Builder.CreateBr(ExitBB);
// Transfer the metadata to the new branch instruction.
NewBI->copyMetadata(*BI, {LLVMContext::MD_loop, LLVMContext::MD_dbg,
LLVMContext::MD_annotation});
BI->eraseFromParent();
DTU.applyUpdates({{DominatorTree::Delete, Latch, Header}});
return;
}
// General case. By splitting the backedge, and then explicitly making it
// unreachable we gracefully handle corner cases such as switch and invoke
// termiantors.
auto *BackedgeBB = SplitEdge(Latch, Header, &DT, &LI, MSSAU.get());
DomTreeUpdater DTU(&DT, DomTreeUpdater::UpdateStrategy::Eager);
(void)changeToUnreachable(BackedgeBB->getTerminator(),
/*PreserveLCSSA*/ true, &DTU, MSSAU.get());
}
}();
// Erase (and destroy) this loop instance. Handles relinking sub-loops
// and blocks within the loop as needed.

4
llvm/test/Transforms/IndVarSimplify/exit_value_test2.ll
View File

@ -90,9 +90,7 @@ define i32 @zero_backedge_count_test(i32 %unknown_init, i32* %unknown_mem) {
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[UNKNOWN_NEXT:%.*]] = load volatile i32, i32* [[UNKNOWN_MEM:%.*]], align 4
; CHECK-NEXT: br i1 false, label [[LOOP_LOOP_CRIT_EDGE:%.*]], label [[LEAVE:%.*]]
; CHECK: loop.loop_crit_edge:
; CHECK-NEXT: unreachable
; CHECK-NEXT: br label [[LEAVE:%.*]]
; CHECK: leave:
; CHECK-NEXT: ret i32 [[UNKNOWN_INIT:%.*]]
;

52
llvm/test/Transforms/LoopDeletion/eval_first_iteration.ll
View File

@ -353,9 +353,7 @@ define i32 @test_ne_const() {
; CHECK-NEXT: [[MERGE_PHI:%.*]] = phi i32 [ 0, [[IF_FALSE]] ], [ [[SUB]], [[LOOP]] ]
; CHECK-NEXT: [[SUM_NEXT:%.*]] = add i32 [[SUM]], [[MERGE_PHI]]
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp ne i32 [[SUM_NEXT]], 4
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[BACKEDGE_LOOP_CRIT_EDGE:%.*]], label [[DONE:%.*]]
; CHECK: backedge.loop_crit_edge:
; CHECK-NEXT: unreachable
; CHECK-NEXT: br label [[DONE:%.*]]
; CHECK: done:
; CHECK-NEXT: [[SUM_NEXT_LCSSA:%.*]] = phi i32 [ [[SUM_NEXT]], [[BACKEDGE]] ]
; CHECK-NEXT: ret i32 [[SUM_NEXT_LCSSA]]
@ -404,9 +402,7 @@ define i32 @test_slt_const() {
; CHECK-NEXT: [[MERGE_PHI:%.*]] = phi i32 [ 0, [[IF_FALSE]] ], [ [[SUB]], [[LOOP]] ]
; CHECK-NEXT: [[SUM_NEXT:%.*]] = add i32 [[SUM]], [[MERGE_PHI]]
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp slt i32 [[SUM_NEXT]], 4
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[BACKEDGE_LOOP_CRIT_EDGE:%.*]], label [[DONE:%.*]]
; CHECK: backedge.loop_crit_edge:
; CHECK-NEXT: unreachable
; CHECK-NEXT: br label [[DONE:%.*]]
; CHECK: done:
; CHECK-NEXT: [[SUM_NEXT_LCSSA:%.*]] = phi i32 [ [[SUM_NEXT]], [[BACKEDGE]] ]
; CHECK-NEXT: ret i32 [[SUM_NEXT_LCSSA]]
@ -455,9 +451,7 @@ define i32 @test_ult_const() {
; CHECK-NEXT: [[MERGE_PHI:%.*]] = phi i32 [ 0, [[IF_FALSE]] ], [ [[SUB]], [[LOOP]] ]
; CHECK-NEXT: [[SUM_NEXT:%.*]] = add i32 [[SUM]], [[MERGE_PHI]]
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp ult i32 [[SUM_NEXT]], 4
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[BACKEDGE_LOOP_CRIT_EDGE:%.*]], label [[DONE:%.*]]
; CHECK: backedge.loop_crit_edge:
; CHECK-NEXT: unreachable
; CHECK-NEXT: br label [[DONE:%.*]]
; CHECK: done:
; CHECK-NEXT: [[SUM_NEXT_LCSSA:%.*]] = phi i32 [ [[SUM_NEXT]], [[BACKEDGE]] ]
; CHECK-NEXT: ret i32 [[SUM_NEXT_LCSSA]]
@ -506,9 +500,7 @@ define i32 @test_sgt_const() {
; CHECK-NEXT: [[MERGE_PHI:%.*]] = phi i32 [ 0, [[IF_FALSE]] ], [ [[SUB]], [[LOOP]] ]
; CHECK-NEXT: [[SUM_NEXT:%.*]] = add i32 [[SUM]], [[MERGE_PHI]]
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp sgt i32 [[SUM_NEXT]], 4
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[BACKEDGE_LOOP_CRIT_EDGE:%.*]], label [[DONE:%.*]]
; CHECK: backedge.loop_crit_edge:
; CHECK-NEXT: unreachable
; CHECK-NEXT: br label [[DONE:%.*]]
; CHECK: done:
; CHECK-NEXT: [[SUM_NEXT_LCSSA:%.*]] = phi i32 [ [[SUM_NEXT]], [[BACKEDGE]] ]
; CHECK-NEXT: ret i32 [[SUM_NEXT_LCSSA]]
@ -557,9 +549,7 @@ define i32 @test_ugt_const() {
; CHECK-NEXT: [[MERGE_PHI:%.*]] = phi i32 [ 0, [[IF_FALSE]] ], [ [[SUB]], [[LOOP]] ]
; CHECK-NEXT: [[SUM_NEXT:%.*]] = add i32 [[SUM]], [[MERGE_PHI]]
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp ugt i32 [[SUM_NEXT]], 4
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[BACKEDGE_LOOP_CRIT_EDGE:%.*]], label [[DONE:%.*]]
; CHECK: backedge.loop_crit_edge:
; CHECK-NEXT: unreachable
; CHECK-NEXT: br label [[DONE:%.*]]
; CHECK: done:
; CHECK-NEXT: [[SUM_NEXT_LCSSA:%.*]] = phi i32 [ [[SUM_NEXT]], [[BACKEDGE]] ]
; CHECK-NEXT: ret i32 [[SUM_NEXT_LCSSA]]
@ -613,9 +603,7 @@ define i32 @test_multiple_pred_const() {
; CHECK-NEXT: [[MERGE_PHI:%.*]] = phi i32 [ 0, [[IF_FALSE]] ], [ [[SUB]], [[IF_TRUE]] ], [ [[SUB]], [[IF_TRUE]] ]
; CHECK-NEXT: [[SUM_NEXT:%.*]] = add i32 [[SUM]], [[MERGE_PHI]]
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp ne i32 [[SUM_NEXT]], 4
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[BACKEDGE_LOOP_CRIT_EDGE:%.*]], label [[DONE:%.*]]
; CHECK: backedge.loop_crit_edge:
; CHECK-NEXT: unreachable
; CHECK-NEXT: br label [[DONE:%.*]]
; CHECK: done:
; CHECK-NEXT: [[SUM_NEXT_LCSSA:%.*]] = phi i32 [ [[SUM_NEXT]], [[BACKEDGE]] ]
; CHECK-NEXT: ret i32 [[SUM_NEXT_LCSSA]]
@ -680,9 +668,7 @@ define i32 @test_multiple_pred_2(i1 %cond, i1 %cond2) {
; CHECK-NEXT: [[MERGE_PHI:%.*]] = phi i32 [ 0, [[IF_FALSE_1]] ], [ 0, [[IF_FALSE_2]] ], [ [[SUB]], [[IF_TRUE_1]] ], [ [[SUB]], [[IF_TRUE_2]] ]
; CHECK-NEXT: [[SUM_NEXT:%.*]] = add i32 [[SUM]], [[MERGE_PHI]]
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp ne i32 [[SUM_NEXT]], 4
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[BACKEDGE_LOOP_CRIT_EDGE:%.*]], label [[DONE:%.*]]
; CHECK: backedge.loop_crit_edge:
; CHECK-NEXT: unreachable
; CHECK-NEXT: br label [[DONE:%.*]]
; CHECK: done:
; CHECK-NEXT: [[SUM_NEXT_LCSSA:%.*]] = phi i32 [ [[SUM_NEXT]], [[BACKEDGE]] ]
; CHECK-NEXT: ret i32 [[SUM_NEXT_LCSSA]]
@ -756,9 +742,7 @@ define i32 @test_multiple_pred_undef_1(i1 %cond, i1 %cond2) {
; CHECK-NEXT: [[MERGE_PHI:%.*]] = phi i32 [ 0, [[IF_FALSE_1]] ], [ 0, [[IF_FALSE_2]] ], [ [[SUB]], [[IF_TRUE_1]] ], [ undef, [[IF_TRUE_2]] ]
; CHECK-NEXT: [[SUM_NEXT:%.*]] = add i32 [[SUM]], [[MERGE_PHI]]
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp ne i32 [[SUM_NEXT]], 4
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[BACKEDGE_LOOP_CRIT_EDGE:%.*]], label [[DONE:%.*]]
; CHECK: backedge.loop_crit_edge:
; CHECK-NEXT: unreachable
; CHECK-NEXT: br label [[DONE:%.*]]
; CHECK: done:
; CHECK-NEXT: [[SUM_NEXT_LCSSA:%.*]] = phi i32 [ [[SUM_NEXT]], [[BACKEDGE]] ]
; CHECK-NEXT: ret i32 [[SUM_NEXT_LCSSA]]
@ -831,9 +815,7 @@ define i32 @test_multiple_pred_undef_2(i1 %cond, i1 %cond2) {
; CHECK-NEXT: [[MERGE_PHI:%.*]] = phi i32 [ 0, [[IF_FALSE_1]] ], [ 0, [[IF_FALSE_2]] ], [ undef, [[IF_TRUE_1]] ], [ [[SUB]], [[IF_TRUE_2]] ]
; CHECK-NEXT: [[SUM_NEXT:%.*]] = add i32 [[SUM]], [[MERGE_PHI]]
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp ne i32 [[SUM_NEXT]], 4
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[BACKEDGE_LOOP_CRIT_EDGE:%.*]], label [[DONE:%.*]]
; CHECK: backedge.loop_crit_edge:
; CHECK-NEXT: unreachable
; CHECK-NEXT: br label [[DONE:%.*]]
; CHECK: done:
; CHECK-NEXT: [[SUM_NEXT_LCSSA:%.*]] = phi i32 [ [[SUM_NEXT]], [[BACKEDGE]] ]
; CHECK-NEXT: ret i32 [[SUM_NEXT_LCSSA]]
@ -906,9 +888,7 @@ define i32 @test_multiple_pred_undef_3(i1 %cond, i1 %cond2) {
; CHECK-NEXT: [[MERGE_PHI:%.*]] = phi i32 [ 0, [[IF_FALSE_1]] ], [ 0, [[IF_FALSE_2]] ], [ undef, [[IF_TRUE_1]] ], [ undef, [[IF_TRUE_2]] ]
; CHECK-NEXT: [[SUM_NEXT:%.*]] = add i32 [[SUM]], [[MERGE_PHI]]
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp ne i32 [[SUM_NEXT]], 4
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[BACKEDGE_LOOP_CRIT_EDGE:%.*]], label [[DONE:%.*]]
; CHECK: backedge.loop_crit_edge:
; CHECK-NEXT: unreachable
; CHECK-NEXT: br label [[DONE:%.*]]
; CHECK: done:
; CHECK-NEXT: [[SUM_NEXT_LCSSA:%.*]] = phi i32 [ [[SUM_NEXT]], [[BACKEDGE]] ]
; CHECK-NEXT: ret i32 [[SUM_NEXT_LCSSA]]
@ -1076,9 +1056,7 @@ define i32 @test_switch_ne_default() {
; CHECK-NEXT: [[MERGE_PHI:%.*]] = phi i32 [ [[SUB]], [[DEFAULT]] ], [ 0, [[ONZERO]] ], [ 1, [[ONONE]] ], [ 2, [[ONTWO]] ]
; CHECK-NEXT: [[SUM_NEXT:%.*]] = add i32 [[SUM]], [[MERGE_PHI]]
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp ne i32 [[SUM_NEXT]], 4
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[BACKEDGE_LOOP_CRIT_EDGE:%.*]], label [[DONE:%.*]]
; CHECK: backedge.loop_crit_edge:
; CHECK-NEXT: unreachable
; CHECK-NEXT: br label [[DONE:%.*]]
; CHECK: done:
; CHECK-NEXT: [[SUM_NEXT_LCSSA:%.*]] = phi i32 [ [[SUM_NEXT]], [[BACKEDGE]] ]
; CHECK-NEXT: ret i32 [[SUM_NEXT_LCSSA]]
@ -1143,9 +1121,7 @@ define i32 @test_switch_ne_one_case() {
; CHECK-NEXT: [[MERGE_PHI:%.*]] = phi i32 [ 2, [[DEFAULT]] ], [ 0, [[ONZERO]] ], [ 1, [[ONONE]] ], [ [[SUB]], [[ONTWO]] ]
; CHECK-NEXT: [[SUM_NEXT:%.*]] = add i32 [[SUM]], [[MERGE_PHI]]
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp ne i32 [[SUM_NEXT]], 4
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[BACKEDGE_LOOP_CRIT_EDGE:%.*]], label [[DONE:%.*]]
; CHECK: backedge.loop_crit_edge:
; CHECK-NEXT: unreachable
; CHECK-NEXT: br label [[DONE:%.*]]
; CHECK: done:
; CHECK-NEXT: [[SUM_NEXT_LCSSA:%.*]] = phi i32 [ [[SUM_NEXT]], [[BACKEDGE]] ]
; CHECK-NEXT: ret i32 [[SUM_NEXT_LCSSA]]
@ -1206,9 +1182,7 @@ define i32 @test_switch_ne_one_case_identical_jumps() {
; CHECK-NEXT: [[MERGE_PHI:%.*]] = phi i32 [ 0, [[DEFAULT]] ], [ 1, [[FIRST_BLOCK]] ], [ [[SUB]], [[LOOP]] ], [ [[SUB]], [[LOOP]] ]
; CHECK-NEXT: [[SUM_NEXT:%.*]] = add i32 [[SUM]], [[MERGE_PHI]]
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp ne i32 [[SUM_NEXT]], 2
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[BACKEDGE_LOOP_CRIT_EDGE:%.*]], label [[DONE:%.*]]
; CHECK: backedge.loop_crit_edge:
; CHECK-NEXT: unreachable
; CHECK-NEXT: br label [[DONE:%.*]]
; CHECK: done:
; CHECK-NEXT: [[SUM_NEXT_LCSSA:%.*]] = phi i32 [ [[SUM_NEXT]], [[BACKEDGE]] ]
; CHECK-NEXT: ret i32 [[SUM_NEXT_LCSSA]]

4
llvm/test/Transforms/LoopDeletion/loops-with-irreducible-subloops.ll
View File

@ -18,9 +18,7 @@ define void @irreducible_subloop_no_mustprogress(i1 %c1, i1 %c2, i1 %c3) {
; CHECK: irr.bb2:
; CHECK-NEXT: br i1 [[C3:%.*]], label [[LOOP1_LATCH]], label [[IRR_BB1]]
; CHECK: loop1.latch:
; CHECK-NEXT: br i1 false, label [[LOOP1_LATCH_LOOP1_CRIT_EDGE:%.*]], label [[EXIT:%.*]]
; CHECK: loop1.latch.loop1_crit_edge:
; CHECK-NEXT: unreachable
; CHECK-NEXT: br label [[EXIT:%.*]]
; CHECK: exit:
; CHECK-NEXT: ret void
;

8
llvm/test/Transforms/LoopDeletion/noop-loops-with-subloops.ll
View File

@ -168,9 +168,7 @@ define void @inner_loop_may_be_infinite(i1 %c1, i1 %c2) {
; CHECK: loop1.latch.loopexit:
; CHECK-NEXT: br label [[LOOP1_LATCH]]
; CHECK: loop1.latch:
; CHECK-NEXT: br i1 false, label [[LOOP1_LATCH_LOOP1_CRIT_EDGE:%.*]], label [[EXIT:%.*]]
; CHECK: loop1.latch.loop1_crit_edge:
; CHECK-NEXT: unreachable
; CHECK-NEXT: br label [[EXIT:%.*]]
; CHECK: exit:
; CHECK-NEXT: ret void
;
@ -280,9 +278,7 @@ define void @loop2_mustprogress_but_not_sibling_loop(i1 %c1, i1 %c2, i1 %c3) {
; CHECK: loop1.latch.loopexit:
; CHECK-NEXT: br label [[LOOP1_LATCH]]
; CHECK: loop1.latch:
; CHECK-NEXT: br i1 false, label [[LOOP1_LATCH_LOOP1_CRIT_EDGE:%.*]], label [[EXIT:%.*]]
; CHECK: loop1.latch.loop1_crit_edge:
; CHECK-NEXT: unreachable
; CHECK-NEXT: br label [[EXIT:%.*]]
; CHECK: exit:
; CHECK-NEXT: ret void
;

6
llvm/test/Transforms/LoopDeletion/pr49967.ll
View File

@ -10,7 +10,7 @@ define void @test() {
; CHECK: vector.ph:
; CHECK-NEXT: br label [[FOR_BODY63:%.*]]
; CHECK: for.cond.cleanup62:
; CHECK-NEXT: br i1 true, label [[FOR_BODY151_PREHEADER:%.*]], label [[VECTOR_PH]]
; CHECK-NEXT: br label [[FOR_BODY151_PREHEADER:%.*]]
; CHECK: for.body151.preheader:
; CHECK-NEXT: br label [[FOR_COND_CLEANUP150_LOOPEXIT:%.*]]
; CHECK: for.body63:
@ -18,9 +18,7 @@ define void @test() {
; CHECK-NEXT: store i16 undef, i16* undef, align 1
; CHECK-NEXT: [[INC89:%.*]] = add nuw nsw i16 [[I58_010]], 1
; CHECK-NEXT: [[EXITCOND12_NOT:%.*]] = icmp eq i16 [[INC89]], 33
; CHECK-NEXT: br i1 [[EXITCOND12_NOT]], label [[FOR_COND_CLEANUP62:%.*]], label [[FOR_BODY63_FOR_BODY63_CRIT_EDGE:%.*]]
; CHECK: for.body63.for.body63_crit_edge:
; CHECK-NEXT: unreachable
; CHECK-NEXT: br label [[FOR_COND_CLEANUP62:%.*]]
; CHECK: for.cond.cleanup150.loopexit:
; CHECK-NEXT: unreachable
;

16
llvm/test/Transforms/LoopDeletion/unreachable-loops.ll
View File

@ -317,21 +317,7 @@ exit:
define void @test9(i64 %n) {
; CHECK-LABEL: @test9(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[L1:%.*]]
; CHECK: L1.loopexit:
; CHECK-NEXT: br label [[L1]]
; CHECK: L1:
; CHECK-NEXT: br i1 true, label [[EXIT:%.*]], label [[L2_PREHEADER:%.*]]
; CHECK: L2.preheader:
; CHECK-NEXT: br label [[L3_PREHEADER:%.*]]
; CHECK: L3.preheader:
; CHECK-NEXT: [[Y_L2_LCSSA:%.*]] = phi i64 [ undef, [[L2_PREHEADER]] ]
; CHECK-NEXT: br label [[L3:%.*]]
; CHECK: L3:
; CHECK-NEXT: [[COND2:%.*]] = icmp slt i64 [[Y_L2_LCSSA]], [[N:%.*]]
; CHECK-NEXT: br i1 [[COND2]], label [[L3_L3_CRIT_EDGE:%.*]], label [[L1_LOOPEXIT:%.*]]
; CHECK: L3.L3_crit_edge:
; CHECK-NEXT: unreachable
; CHECK-NEXT: br label [[EXIT:%.*]]
; CHECK: exit:
; CHECK-NEXT: ret void
;

38
llvm/test/Transforms/LoopDeletion/zero-btc.ll
View File

@ -9,9 +9,7 @@ define void @test_trivial() {
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: store i32 0, i32* @G, align 4
; CHECK-NEXT: br i1 false, label [[LOOP_LOOP_CRIT_EDGE:%.*]], label [[EXIT:%.*]]
; CHECK: loop.loop_crit_edge:
; CHECK-NEXT: unreachable
; CHECK-NEXT: br label [[EXIT:%.*]]
; CHECK: exit:
; CHECK-NEXT: ret void
;
@ -36,9 +34,7 @@ define void @test_bottom_tested() {
; CHECK-NEXT: store i32 0, i32* @G, align 4
; CHECK-NEXT: [[IV_INC:%.*]] = add i32 [[IV]], 1
; CHECK-NEXT: [[BE_TAKEN:%.*]] = icmp ne i32 [[IV_INC]], 1
; CHECK-NEXT: br i1 [[BE_TAKEN]], label [[LOOP_LOOP_CRIT_EDGE:%.*]], label [[EXIT:%.*]]
; CHECK: loop.loop_crit_edge:
; CHECK-NEXT: unreachable
; CHECK-NEXT: br label [[EXIT:%.*]]
; CHECK: exit:
; CHECK-NEXT: ret void
;
@ -67,8 +63,6 @@ define void @test_early_exit() {
; CHECK-NEXT: [[BE_TAKEN:%.*]] = icmp ne i32 [[IV_INC]], 1
; CHECK-NEXT: br i1 [[BE_TAKEN]], label [[LATCH:%.*]], label [[EXIT:%.*]]
; CHECK: latch:
; CHECK-NEXT: br label [[LATCH_SPLIT:%.*]]
; CHECK: latch.split:
; CHECK-NEXT: unreachable
; CHECK: exit:
; CHECK-NEXT: ret void
@ -102,9 +96,7 @@ define void @test_multi_exit1() {
; CHECK: latch:
; CHECK-NEXT: store i32 1, i32* @G, align 4
; CHECK-NEXT: [[COND2:%.*]] = icmp ult i32 [[IV_INC]], 30
; CHECK-NEXT: br i1 [[COND2]], label [[LATCH_LOOP_CRIT_EDGE:%.*]], label [[EXIT]]
; CHECK: latch.loop_crit_edge:
; CHECK-NEXT: unreachable
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
; CHECK-NEXT: ret void
;
@ -135,9 +127,7 @@ define void @test_multi_exit2() {
; CHECK-NEXT: br i1 true, label [[LATCH:%.*]], label [[EXIT:%.*]]
; CHECK: latch:
; CHECK-NEXT: store i32 1, i32* @G, align 4
; CHECK-NEXT: br i1 false, label [[LATCH_LOOP_CRIT_EDGE:%.*]], label [[EXIT]]
; CHECK: latch.loop_crit_edge:
; CHECK-NEXT: unreachable
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
; CHECK-NEXT: ret void
;
@ -167,9 +157,7 @@ define void @test_multi_exit3(i1 %cond1) {
; CHECK-NEXT: store i32 1, i32* @G, align 4
; CHECK-NEXT: [[IV_INC:%.*]] = add i32 [[IV]], 1
; CHECK-NEXT: [[BE_TAKEN:%.*]] = icmp ne i32 [[IV_INC]], 1
; CHECK-NEXT: br i1 [[BE_TAKEN]], label [[LATCH_LOOP_CRIT_EDGE:%.*]], label [[EXIT]]
; CHECK: latch.loop_crit_edge:
; CHECK-NEXT: unreachable
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
; CHECK-NEXT: ret void
;
@ -229,9 +217,7 @@ define void @test_multi_exit5() {
; CHECK-NEXT: br i1 true, label [[LATCH:%.*]], label [[EXIT1:%.*]]
; CHECK: latch:
; CHECK-NEXT: store i32 1, i32* @G, align 4
; CHECK-NEXT: br i1 false, label [[LATCH_LOOP_CRIT_EDGE:%.*]], label [[EXIT2:%.*]]
; CHECK: latch.loop_crit_edge:
; CHECK-NEXT: unreachable
; CHECK-NEXT: br label [[EXIT2:%.*]]
; CHECK: exit1:
; CHECK-NEXT: ret void
; CHECK: exit2:
@ -267,9 +253,7 @@ define void @test_live_inner() {
; CHECK-NEXT: [[CND:%.*]] = icmp ult i32 [[IV_INC]], 200
; CHECK-NEXT: br i1 [[CND]], label [[INNER]], label [[LATCH:%.*]]
; CHECK: latch:
; CHECK-NEXT: br i1 false, label [[LATCH_LOOP_CRIT_EDGE:%.*]], label [[EXIT:%.*]]
; CHECK: latch.loop_crit_edge:
; CHECK-NEXT: unreachable
; CHECK-NEXT: br label [[EXIT:%.*]]
; CHECK: exit:
; CHECK-NEXT: ret void
;
@ -303,9 +287,7 @@ define void @test_live_outer() {
; CHECK-NEXT: br label [[INNER:%.*]]
; CHECK: inner:
; CHECK-NEXT: store i32 0, i32* @G, align 4
; CHECK-NEXT: br i1 false, label [[INNER_INNER_CRIT_EDGE:%.*]], label [[LATCH]]
; CHECK: inner.inner_crit_edge:
; CHECK-NEXT: unreachable
; CHECK-NEXT: br label [[LATCH]]
; CHECK: latch:
; CHECK-NEXT: store i32 [[IV]], i32* @G, align 4
; CHECK-NEXT: [[IV_INC]] = add i32 [[IV]], 1
@ -350,9 +332,7 @@ define void @loop_nest_lcssa() {
; CHECK-NEXT: br i1 false, label [[INNER_LATCH:%.*]], label [[OUTER_LATCH:%.*]]
; CHECK: inner_latch:
; CHECK-NEXT: [[DOTLCSSA:%.*]] = phi i32 [ [[TMP0]], [[INNER_HEADER]] ]
; CHECK-NEXT: br i1 false, label [[INNER_LATCH_INNER_HEADER_CRIT_EDGE:%.*]], label [[LOOPEXIT:%.*]]
; CHECK: inner_latch.inner_header_crit_edge:
; CHECK-NEXT: unreachable
; CHECK-NEXT: br label [[LOOPEXIT:%.*]]
; CHECK: outer_latch:
; CHECK-NEXT: br label [[OUTER_HEADER]]
; CHECK: loopexit: