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llvm-svn: 273130
This commit is contained in:
NAKAMURA Takumi 2016-06-20 00:49:20 +00:00
parent fe1202c4cb
commit ae7c97d39d
2 changed files with 6 additions and 6 deletions
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6
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
View File

@ -9848,7 +9848,7 @@ SDValue PPCTargetLowering::DAGCombineTruncBoolExt(SDNode *N,
std::list<HandleSDNode> PromOpHandles;
for (auto &PromOp : PromOps)
PromOpHandles.emplace_back(PromOp);
PromOpHandles.emplace_back(PromOp);
// Replace all operations (these are all the same, but have a different
// (i1) return type). DAG.getNode will validate that the types of
@ -10102,7 +10102,7 @@ SDValue PPCTargetLowering::DAGCombineExtBoolTrunc(SDNode *N,
std::list<HandleSDNode> PromOpHandles;
for (auto &PromOp : PromOps)
PromOpHandles.emplace_back(PromOp);
PromOpHandles.emplace_back(PromOp);
// Replace all operations (these are all the same, but have a different
// (promoted) return type). DAG.getNode will validate that the types of
@ -10555,7 +10555,7 @@ SDValue PPCTargetLowering::PerformDAGCombine(SDNode *N,
if (Bitcast->getOpcode() != ISD::BITCAST ||
Bitcast->getValueType(0) != MVT::f32)
return false;
if (Bitcast2->getOpcode() != ISD::BITCAST ||
if (Bitcast2->getOpcode() != ISD::BITCAST ||
Bitcast2->getValueType(0) != MVT::f32)
return false;

6
llvm/lib/Target/SystemZ/SystemZShortenInst.cpp
View File

@ -72,9 +72,9 @@ static void tieOpsIfNeeded(MachineInstr &MI) {
// MI loads one word of a GPR using an IIxF instruction and LLIxL and LLIxH
// are the halfword immediate loads for the same word. Try to use one of them
// instead of IIxF.
bool SystemZShortenInst::shortenIIF(MachineInstr &MI,
unsigned LLIxL, unsigned LLIxH) {
// instead of IIxF.
bool SystemZShortenInst::shortenIIF(MachineInstr &MI, unsigned LLIxL,
unsigned LLIxH) {
unsigned Reg = MI.getOperand(0).getReg();
// The new opcode will clear the other half of the GR64 reg, so
// cancel if that is live.