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[X86] Use the SimplifyDemandedBits wrappers where possible. NFCI. 

Leave the wrapper to handle TargetLowering::TargetLoweringOpt and CommitTargetLoweringOpt.

llvm-svn: 343918
This commit is contained in:
Simon Pilgrim 2018-10-06 13:29:08 +00:00
parent b616b809a3
commit ae78d709b4
1 changed files with 4 additions and 23 deletions
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27
llvm/lib/Target/X86/X86ISelLowering.cpp
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@ -37721,8 +37721,6 @@ static SDValue combineBEXTR(SDNode *N, SelectionDAG &DAG,
unsigned NumBits = VT.getSizeInBits();
const TargetLowering &TLI = DAG.getTargetLoweringInfo();
TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(),
!DCI.isBeforeLegalizeOps());
// TODO - Constant Folding.
if (auto *Cst1 = dyn_cast<ConstantSDNode>(Op1)) {
@ -37736,12 +37734,9 @@ static SDValue combineBEXTR(SDNode *N, SelectionDAG &DAG,
}
// Only bottom 16-bits of the control bits are required.
KnownBits Known;
APInt DemandedMask(APInt::getLowBitsSet(NumBits, 16));
if (TLI.SimplifyDemandedBits(Op1, DemandedMask, Known, TLO)) {
DCI.CommitTargetLoweringOpt(TLO);
if (TLI.SimplifyDemandedBits(Op1, DemandedMask, DCI))
return SDValue(N, 0);
}
return SDValue();
}
@ -38839,16 +38834,11 @@ static SDValue combineMOVMSK(SDNode *N, SelectionDAG &DAG,
Src = Src.getOperand(0);
const TargetLowering &TLI = DAG.getTargetLoweringInfo();
TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(),
!DCI.isBeforeLegalizeOps());
// MOVMSK only uses the MSB from each vector element.
KnownBits Known;
APInt DemandedMask(APInt::getSignMask(SrcVT.getScalarSizeInBits()));
if (TLI.SimplifyDemandedBits(Src, DemandedMask, Known, TLO)) {
DCI.CommitTargetLoweringOpt(TLO);
if (TLI.SimplifyDemandedBits(Src, DemandedMask, DCI))
return SDValue(N, 0);
}
// Combine (movmsk (setne (and X, (1 << C)), 0)) -> (movmsk (X << C)).
// Only do this when the setcc input and output types are the same and the
@ -40315,22 +40305,13 @@ static SDValue combinePMULDQ(SDNode *N, SelectionDAG &DAG,
return RHS;
const TargetLowering &TLI = DAG.getTargetLoweringInfo();
TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(),
!DCI.isBeforeLegalizeOps());
APInt DemandedMask(APInt::getLowBitsSet(64, 32));
// PMULQDQ/PMULUDQ only uses lower 32 bits from each vector element.
KnownBits LHSKnown;
if (TLI.SimplifyDemandedBits(LHS, DemandedMask, LHSKnown, TLO)) {
DCI.CommitTargetLoweringOpt(TLO);
if (TLI.SimplifyDemandedBits(LHS, DemandedMask, DCI))
return SDValue(N, 0);
}
KnownBits RHSKnown;
if (TLI.SimplifyDemandedBits(RHS, DemandedMask, RHSKnown, TLO)) {
DCI.CommitTargetLoweringOpt(TLO);
if (TLI.SimplifyDemandedBits(RHS, DemandedMask, DCI))
return SDValue(N, 0);
}
return SDValue();
}