forked from OSchip/llvm-project
AMDGPU/GlobalISel: Disallow VGPR->SCC copies
This fixes using scalar adds when only the carry in is a VGPR using greedy regbankselect. llvm-svn: 350593
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@ -74,13 +74,19 @@ unsigned AMDGPURegisterBankInfo::copyCost(const RegisterBank &Dst,
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const RegisterBank &Src,
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unsigned Size) const {
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if (Dst.getID() == AMDGPU::SGPRRegBankID &&
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Src.getID() == AMDGPU::VGPRRegBankID)
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Src.getID() == AMDGPU::VGPRRegBankID) {
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// For boolean values, we can do a v_cmp to "copy" a VGPR to VCC.
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if (Size == 1)
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return 1;
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return std::numeric_limits<unsigned>::max();
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}
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// SGPRRegBank with size 1 is actually vcc or another 64-bit sgpr written by
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// the valu.
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if (Size == 1 && Dst.getID() == AMDGPU::SCCRegBankID &&
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Src.getID() == AMDGPU::SGPRRegBankID)
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(Src.getID() == AMDGPU::SGPRRegBankID ||
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Src.getID() == AMDGPU::VGPRRegBankID))
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return std::numeric_limits<unsigned>::max();
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return RegisterBankInfo::copyCost(Dst, Src, Size);
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@ -84,8 +84,10 @@ body: |
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; GREEDY: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
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; GREEDY: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; GREEDY: [[TRUNC:%[0-9]+]]:vgpr(s1) = G_TRUNC [[COPY2]](s32)
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; GREEDY: [[COPY3:%[0-9]+]]:scc(s1) = COPY [[TRUNC]](s1)
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; GREEDY: [[SADDE:%[0-9]+]]:sgpr(s32), [[SADDE1:%[0-9]+]]:scc(s1) = G_SADDE [[COPY]], [[COPY1]], [[COPY3]]
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; GREEDY: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)
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; GREEDY: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
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; GREEDY: [[COPY5:%[0-9]+]]:sgpr(s1) = COPY [[TRUNC]](s1)
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; GREEDY: [[SADDE:%[0-9]+]]:vgpr(s32), [[SADDE1:%[0-9]+]]:sgpr(s1) = G_SADDE [[COPY3]], [[COPY4]], [[COPY5]]
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%0:_(s32) = COPY $sgpr0
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%1:_(s32) = COPY $sgpr1
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%2:_(s32) = COPY $vgpr0
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@ -84,8 +84,10 @@ body: |
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; GREEDY: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
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; GREEDY: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; GREEDY: [[TRUNC:%[0-9]+]]:vgpr(s1) = G_TRUNC [[COPY2]](s32)
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; GREEDY: [[COPY3:%[0-9]+]]:scc(s1) = COPY [[TRUNC]](s1)
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; GREEDY: [[SSUBE:%[0-9]+]]:sgpr(s32), [[SSUBE1:%[0-9]+]]:scc(s1) = G_SSUBE [[COPY]], [[COPY1]], [[COPY3]]
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; GREEDY: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)
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; GREEDY: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
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; GREEDY: [[COPY5:%[0-9]+]]:sgpr(s1) = COPY [[TRUNC]](s1)
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; GREEDY: [[SSUBE:%[0-9]+]]:vgpr(s32), [[SSUBE1:%[0-9]+]]:sgpr(s1) = G_SSUBE [[COPY3]], [[COPY4]], [[COPY5]]
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%0:_(s32) = COPY $sgpr0
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%1:_(s32) = COPY $sgpr1
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%2:_(s32) = COPY $vgpr0
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@ -83,8 +83,10 @@ body: |
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; GREEDY: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
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; GREEDY: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; GREEDY: [[TRUNC:%[0-9]+]]:vgpr(s1) = G_TRUNC [[COPY2]](s32)
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; GREEDY: [[COPY3:%[0-9]+]]:scc(s1) = COPY [[TRUNC]](s1)
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; GREEDY: [[UADDE:%[0-9]+]]:sgpr(s32), [[UADDE1:%[0-9]+]]:scc(s1) = G_UADDE [[COPY]], [[COPY1]], [[COPY3]]
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; GREEDY: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)
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; GREEDY: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
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; GREEDY: [[COPY5:%[0-9]+]]:sgpr(s1) = COPY [[TRUNC]](s1)
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; GREEDY: [[UADDE:%[0-9]+]]:vgpr(s32), [[UADDE1:%[0-9]+]]:sgpr(s1) = G_UADDE [[COPY3]], [[COPY4]], [[COPY5]]
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%0:_(s32) = COPY $sgpr0
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%1:_(s32) = COPY $sgpr1
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%2:_(s32) = COPY $vgpr0
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@ -84,8 +84,10 @@ body: |
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; GREEDY: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
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; GREEDY: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; GREEDY: [[TRUNC:%[0-9]+]]:vgpr(s1) = G_TRUNC [[COPY2]](s32)
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; GREEDY: [[COPY3:%[0-9]+]]:scc(s1) = COPY [[TRUNC]](s1)
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; GREEDY: [[USUBE:%[0-9]+]]:sgpr(s32), [[USUBE1:%[0-9]+]]:scc(s1) = G_USUBE [[COPY]], [[COPY1]], [[COPY3]]
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; GREEDY: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)
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; GREEDY: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
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; GREEDY: [[COPY5:%[0-9]+]]:sgpr(s1) = COPY [[TRUNC]](s1)
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; GREEDY: [[USUBE:%[0-9]+]]:vgpr(s32), [[USUBE1:%[0-9]+]]:sgpr(s1) = G_USUBE [[COPY3]], [[COPY4]], [[COPY5]]
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%0:_(s32) = COPY $sgpr0
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%1:_(s32) = COPY $sgpr1
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%2:_(s32) = COPY $vgpr0
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