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LOAD COMPLEMENT instruction is not really two-addr 

llvm-svn: 76031
This commit is contained in:
Anton Korobeynikov 2009-07-16 14:23:30 +00:00
parent 82af42d361
commit ae2d8abf2c
1 changed files with 5 additions and 4 deletions
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9
llvm/lib/Target/SystemZ/SystemZInstrFP.td
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@ -69,18 +69,19 @@ def FMOV64mry : Pseudo<(outs), (ins rriaddr:$dst, FP64:$src),
// Arithmetic Instructions
let isTwoAddress = 1 in {
let Defs = [PSW] in {
def FNEG32rr : Pseudo<(outs FP32:$dst), (ins FP32:$src),
"lcebr\t{$dst}",
"lcebr\t{$dst, $src}",
[(set FP32:$dst, (fneg FP32:$src)),
(implicit PSW)]>;
def FNEG64rr : Pseudo<(outs FP64:$dst), (ins FP64:$src),
"lcdbr\t{$dst}",
"lcdbr\t{$dst, $src}",
[(set FP64:$dst, (fneg FP64:$src)),
(implicit PSW)]>;
}
let isTwoAddress = 1 in {
let Defs = [PSW] in {
// FIXME: Add peephole for fneg(fabs) => load negative
def FABS32rr : Pseudo<(outs FP32:$dst), (ins FP32:$src),