Add more make utility functions.

- With tests. :)

llvm-svn: 93716
This commit is contained in:
Daniel Dunbar 2010-01-18 06:48:48 +00:00
parent 2d9816e44b
commit ae28e68d09
2 changed files with 114 additions and 2 deletions

View File

@ -0,0 +1,59 @@
include make/util.mk
streq_t0 = $(call streq,,)
$(call AssertEqual,streq_t0,true)
streq_t1 = $(call streq,b,)
$(call AssertEqual,streq_t1,)
streq_t2 = $(call streq,,b)
$(call AssertEqual,streq_t2,)
streq_t3 = $(call streq,b,b)
$(call AssertEqual,streq_t3,true)
streq_t4 = $(call streq,bb,b)
$(call AssertEqual,streq_t4,)
streq_t5 = $(call streq,b,bb)
$(call AssertEqual,streq_t5,)
streq_t6 = $(call streq,bb,bb)
$(call AssertEqual,streq_t6,true)
strneq_t7 = $(call strneq,,)
$(call AssertEqual,strneq_t7,)
strneq_t8 = $(call strneq,b,)
$(call AssertEqual,strneq_t8,true)
strneq_t9 = $(call strneq,,b)
$(call AssertEqual,strneq_t9,true)
strneq_t10 = $(call strneq,b,b)
$(call AssertEqual,strneq_t10,)
strneq_t11 = $(call strneq,bb,b)
$(call AssertEqual,strneq_t11,true)
strneq_t12 = $(call strneq,b,bb)
$(call AssertEqual,strneq_t12,true)
strneq_t13 = $(call strneq,bb,bb)
$(call AssertEqual,strneq_t13,)
contains_t0 = $(call contains,a b b c,a)
$(call AssertEqual,contains_t0,true)
contains_t1 = $(call contains,a b b c,b)
$(call AssertEqual,contains_t1,true)
contains_t2 = $(call contains,a b b c,c)
$(call AssertEqual,contains_t2,true)
contains_t3 = $(call contains,a b b c,d)
$(call AssertEqual,contains_t3,)
isdefined_t0_defined_var := 0
isdefined_t0 = $(call IsDefined,isdefined_t0_defined_var)
$(call AssertEqual,isdefined_t0,true)
isdefined_t1 = $(call IsDefined,isdefined_t1_never_defined_var)
$(call AssertEqual,isdefined_t1,)
varordefault_t0_var := 1
varordefault_t0 = $(call VarOrDefault,varordefault_t0_var.opt,$(varordefault_t0_var))
$(call AssertEqual,varordefault_t0,1)
varordefault_t1_var := 1
varordefault_t1_var.opt := 2
varordefault_t1 = $(call VarOrDefault,varordefault_t1_var.opt,$(varordefault_t1_var))
$(call AssertEqual,varordefault_t1,2)
all:
@true
.PHONY: all

View File

@ -1,4 +1,4 @@
# Makefile utilities
# Generic Makefile Utilities
###
# Utility functions
@ -15,6 +15,19 @@ streq = $(if $(1),$(if $(subst $(1),,$(2))$(subst $(2),,$(1)),,true),$(if $(2),,
# Return "true" if LHS != RHS, otherwise "".
strneq = $(if $(call streq,$(1),$(2)),,true)
# Function: contains list item
#
# Return "true" if 'list' contains the value 'item'.
contains = $(if $(strip $(foreach i,$(1),$(if $(call streq,$(2),$(i)),T,))),true,)
# Function: is_subset a b
# Return "true" if 'a' is a subset of 'b'.
is_subset = $(if $(strip $(set_difference $(1),$(2))),,true)
# Function: set_difference a b
# Return a - b.
set_difference = $(foreach i,$(1),$(if $(call contains,$(2),$(i)),,$(i)))
# Function: Set variable value
#
# Set the given make variable to the given value.
@ -25,6 +38,47 @@ Set = $(eval $(1) := $(2))
# Append the given value to the given make variable.
Append = $(eval $(1) += $(2))
# Function: IsDefined variable
#
# Check whether the given variable is defined.
IsDefined = $(call strneq,undefined,$(flavor $(1)))
# Function: IsUndefined variable
#
# Check whether the given variable is undefined.
IsUndefined = $(call streq,undefined,$(flavor $(1)))
# Function: VarOrDefault variable default-value
#
# Get the value of the given make variable, or the default-value if the variable
# is undefined.
VarOrDefault = $(if $(call IsDefined,$(1)),$($(1)),$(2))
# Function: CheckValue variable
#
# Print the name, definition, and value of a variable, for testing make
# utilities.
#
# Example:
# foo = $(call streq,a,a)
# $(call CheckValue,foo)
# Example Output:
# CHECKVALUE: foo: $(call streq,,) - true
CheckValue = $(info CHECKVALUE: $(1): $(value $(1)) - $($(1)))
# Function: Assert value message
#
# Check that a value is true, or give an error including the given message
Assert = $(if $(1),,\
$(error Assertion failed: $(2)))
# Function: AssertEqual variable expected-value
#
# Check that the value of a variable is 'expected-value'.
AssertEqual = \
$(if $(call streq,$($(1)),$(2)),,\
$(error Assertion failed: $(1): $(value $(1)) - $($(1)) != $(2)))
###
# Clean up make behavior
@ -38,4 +92,3 @@ Append = $(eval $(1) += $(2))
# and origin of XXX.
make-print-%:
$(error PRINT: $(value $*) = "$($*)" (from $(origin $*)))