forked from OSchip/llvm-project
Minor spelling tweaks
Closes tensorflow/mlir#304 PiperOrigin-RevId: 284568358
This commit is contained in:
parent
91c0074624
commit
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@ -49,7 +49,7 @@ class Toy_Op<string mnemonic, list<OpTrait> traits = []> :
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// and may be removed if dead.
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def ConstantOp : Toy_Op<"constant", [NoSideEffect]> {
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// Provide a summary and description for this operation. This can be used to
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// auto-generate documenatation of the operations within our dialect.
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// auto-generate documentation of the operations within our dialect.
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let summary = "constant";
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let description = [{
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Constant operation turns a literal into an SSA value. The data is attached
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@ -49,7 +49,7 @@ class Toy_Op<string mnemonic, list<OpTrait> traits = []> :
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// and may be removed if dead.
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def ConstantOp : Toy_Op<"constant", [NoSideEffect]> {
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// Provide a summary and description for this operation. This can be used to
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// auto-generate documenatation of the operations within our dialect.
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// auto-generate documentation of the operations within our dialect.
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let summary = "constant";
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let description = [{
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Constant operation turns a literal into an SSA value. The data is attached
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@ -50,7 +50,7 @@ class Toy_Op<string mnemonic, list<OpTrait> traits = []> :
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// and may be removed if dead.
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def ConstantOp : Toy_Op<"constant", [NoSideEffect]> {
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// Provide a summary and description for this operation. This can be used to
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// auto-generate documenatation of the operations within our dialect.
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// auto-generate documentation of the operations within our dialect.
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let summary = "constant";
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let description = [{
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Constant operation turns a literal into an SSA value. The data is attached
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@ -50,7 +50,7 @@ class Toy_Op<string mnemonic, list<OpTrait> traits = []> :
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// and may be removed if dead.
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def ConstantOp : Toy_Op<"constant", [NoSideEffect]> {
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// Provide a summary and description for this operation. This can be used to
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// auto-generate documenatation of the operations within our dialect.
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// auto-generate documentation of the operations within our dialect.
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let summary = "constant";
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let description = [{
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Constant operation turns a literal into an SSA value. The data is attached
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@ -50,7 +50,7 @@ class Toy_Op<string mnemonic, list<OpTrait> traits = []> :
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// and may be removed if dead.
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def ConstantOp : Toy_Op<"constant", [NoSideEffect]> {
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// Provide a summary and description for this operation. This can be used to
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// auto-generate documenatation of the operations within our dialect.
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// auto-generate documentation of the operations within our dialect.
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let summary = "constant";
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let description = [{
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Constant operation turns a literal into an SSA value. The data is attached
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@ -59,7 +59,7 @@ def Toy_Type : AnyTypeOf<[F64Tensor, Toy_StructType]>;
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def ConstantOp : Toy_Op<"constant",
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[NoSideEffect, DeclareOpInterfaceMethods<ShapeInferenceOpInterface>]> {
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// Provide a summary and description for this operation. This can be used to
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// auto-generate documenatation of the operations within our dialect.
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// auto-generate documentation of the operations within our dialect.
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let summary = "constant";
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let description = [{
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Constant operation turns a literal into an SSA value. The data is attached
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@ -613,7 +613,7 @@ private:
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/// `struct` keyword, followed by a block containing a list of variable
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/// declarations.
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///
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/// definition ::= `struct` identifer `{` decl+ `}`
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/// definition ::= `struct` identifier `{` decl+ `}`
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std::unique_ptr<StructAST> parseStruct() {
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auto loc = lexer.getLastLocation();
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lexer.consume(tok_struct);
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@ -78,7 +78,7 @@ Traits may be used when defining a derived operation type, by simply adding the
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name of the trait class to the `Op` class after the concrete operation type:
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```c++
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/// Here we define 'MyOp' along with the 'MyTrait' and `MyParameteric trait
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/// Here we define 'MyOp' along with the 'MyTrait' and `MyParametric trait
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/// classes we defined previously.
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class MyOp : public Op<MyOp, MyTrait, MyParametricTrait<10>::Impl> {};
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```
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@ -154,7 +154,7 @@ def GPU_GPUFuncOp : GPU_Op<"func", [FunctionLike, IsolatedFromAbove, Symbol]> {
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/// Returns the name of the attribute containing the number of buffers
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/// located in the workgroup memory.
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static StringRef getNumWorkgroupAttributionsAttrName() {
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return "workgroup_attibutions";
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return "workgroup_attributions";
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}
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// FunctionLike trait needs access to the functions below.
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@ -63,7 +63,7 @@ public:
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/// Checks whether a type is legal in terms of Vulkan layout info
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/// decoration. A type is dynamically illegal if it's a composite type in the
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/// StorageBuffer, PhysicalStorageBuffer, Uniform, and PushConstant Storage
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/// Classes without layout informtation.
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/// Classes without layout information.
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static bool isLegalType(Type type);
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private:
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@ -193,7 +193,7 @@ def SPV_BitFieldSExtractOp : SPV_BitFieldExtractOp<"BitFieldSExtract", []> {
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``` {.ebnf}
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integer-scalar-vector-type ::= integer-type |
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`vector<` integer-literal `x` integer-type `>`
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bitfield-exctact-s-op ::= ssa-id `=` `spv.BitFieldSExtract` ssa-use
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bitfield-extract-s-op ::= ssa-id `=` `spv.BitFieldSExtract` ssa-use
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`,` ssa-use `,` ssa-use
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`:` integer-scalar-vector-type
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`,` integer-type `,` integer-type
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@ -222,7 +222,7 @@ def SPV_BitFieldUExtractOp : SPV_BitFieldExtractOp<"BitFieldUExtract", []> {
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``` {.ebnf}
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integer-scalar-vector-type ::= integer-type |
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`vector<` integer-literal `x` integer-type `>`
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bitfield-exctact-u-op ::= ssa-id `=` `spv.BitFieldUExtract` ssa-use
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bitfield-extract-u-op ::= ssa-id `=` `spv.BitFieldUExtract` ssa-use
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`,` ssa-use `,` ssa-use
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`:` integer-scalar-vector-type
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`,` integer-type `,` integer-type
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@ -30,7 +30,7 @@
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namespace mlir {
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/// Type conversion from stdandard types to SPIR-V types for shader interface.
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/// Type conversion from standard types to SPIR-V types for shader interface.
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///
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/// For composite types, this converter additionally performs type wrapping to
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/// satisfy shader interface requirements: shader interface types must be
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@ -39,10 +39,10 @@ class SPIRVTypeConverter final : public TypeConverter {
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public:
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using TypeConverter::TypeConverter;
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/// Converts the given standard `type` to SPIR-V correspondance.
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/// Converts the given standard `type` to SPIR-V correspondence.
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Type convertType(Type type) override;
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/// Gets the SPIR-V correspondance for the standard index type.
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/// Gets the SPIR-V correspondence for the standard index type.
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static Type getIndexType(MLIRContext *context);
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};
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@ -392,7 +392,7 @@ def SPV_UndefOp : SPV_Op<"undef", []> {
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### Custom assembly form
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``` {.ebnf}
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undef-op ::= `spv.undef` `:` sprirv-type
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undef-op ::= `spv.undef` `:` spirv-type
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```
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For example:
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@ -190,7 +190,7 @@ public:
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unsigned getSrcMemRefRank() {
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return getSrcMemRef()->getType().cast<MemRefType>().getRank();
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}
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// Returns the source memerf indices for this DMA operation.
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// Returns the source memref indices for this DMA operation.
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operand_range getSrcIndices() {
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return {getOperation()->operand_begin() + 1,
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getOperation()->operand_begin() + 1 + getSrcMemRefRank()};
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@ -1236,7 +1236,7 @@ def SubViewOp : Std_Op<"subview", [AttrSizedOperandSegments, NoSideEffect]> {
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: memref<?x?xf32, (d0, d1)[s0, s1, s2] -> (d0 * s1 + d1 * s2 + s0)> to
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memref<4x4xf32, (d0, d1)[r0, r1, r2] -> (d0 * r1 + d1 * r2 + r0)>
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// Note that the subview op does not gaurantee that the result
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// Note that the subview op does not guarantee that the result
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// memref is "inbounds" w.r.t to base memref. It is upto the client
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// to ensure that the subview is accessed in a manner that is
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// in-bounds.
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@ -206,7 +206,7 @@ def Vector_BroadcastOp :
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<duplication> <potential stretch>
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```
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The source operand is duplicated over all the missing leading dimensions
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and streched over the trailing dimensions where the source has a non-equal
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and stretched over the trailing dimensions where the source has a non-equal
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dimension of 1. These rules imply that any scalar broadcast (k=0) to any
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shaped vector with the same element type is always legal.
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@ -658,7 +658,7 @@ def Vector_ConstantMaskOp :
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are set to '0' or '1', based on whether the element indices are contained
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within a hyper-rectangular region specified by the 'mask_dim_sizes'
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array attribute argument. Each element of the 'mask_dim_sizes' array,
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specifices an exclusive upper bound [0, mask-dim-size-element-value)
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specifies an exclusive upper bound [0, mask-dim-size-element-value)
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for a unique dimension in the vector result. The conjunction of the ranges
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define a hyper-rectangular region within which elements values are set to 1
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(otherwise element values are set to 0).
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@ -209,7 +209,7 @@ private:
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/// ```
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class AffineLoopNestBuilder {
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public:
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// This entry point accomodates the fact that AffineForOp implicitly uses
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// This entry point accommodates the fact that AffineForOp implicitly uses
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// multiple `lbs` and `ubs` with one single `iv` and `step` to encode `max`
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// and and `min` constraints respectively.
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AffineLoopNestBuilder(ValueHandle *iv, ArrayRef<ValueHandle> lbs,
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@ -308,7 +308,7 @@ template <typename ConcreteDialect> void registerDialect() {
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});
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}
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/// DialectRegistration provides a global initialiser that registers a Dialect
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/// DialectRegistration provides a global initializer that registers a Dialect
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/// allocation routine.
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///
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/// Usage:
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@ -50,7 +50,7 @@ public:
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/// based on information coming from DialectHooksRegistration.
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void registerDialectHooksSetter(const DialectHooksSetter &function);
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/// DialectHooksRegistration provides a global initialiser that registers
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/// DialectHooksRegistration provides a global initializer that registers
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/// a dialect hooks setter routine.
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/// Usage:
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///
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@ -127,7 +127,7 @@ public:
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/// of the symbol table, and not the op itself. This function will also return
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/// false if there are any unknown operations that may potentially be symbol
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/// tables. This doesn't necessarily mean that there are no uses, we just
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/// can't convervatively prove it.
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/// can't conservatively prove it.
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static bool symbolKnownUseEmpty(StringRef symbol, Operation *from);
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/// Attempt to replace all uses of the given symbol 'oldSymbol' with the
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@ -97,7 +97,7 @@ public:
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/// Returns the internal implementation instance.
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detail::OpPassManagerImpl &getImpl();
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/// Prints out the passes of the pass mangager as the textual representation
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/// Prints out the passes of the pass manager as the textual representation
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/// of pipelines.
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/// Note: The quality of the string representation depends entirely on the
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/// the correctness of per-pass overrides of Pass::printAsTextualPipeline.
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@ -44,7 +44,7 @@ namespace tblgen {
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/// named as $<name>, and we can potentially support referencing those entities
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/// directly in the format template in the future.
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//
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/// Custom ones are registered by dialect-specific TablGen backends and use the
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/// Custom ones are registered by dialect-specific TableGen backends and use the
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/// same unified setter.
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class FmtContext {
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public:
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@ -338,8 +338,8 @@ public:
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const char *separator = ", ") const;
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// Splits the given `symbol` into a value pack name and an index. Returns the
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// value pack name and writes the index to `index` on sucess. Returns `symbol`
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// itself if it does not contain an index.
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// value pack name and writes the index to `index` on success. Returns
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// `symbol` itself if it does not contain an index.
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//
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// We can use `name__N` to access the `N`-th value in the value pack bound to
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// `name`. `name` is typically the results of an multi-result op.
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@ -64,7 +64,7 @@ using TranslateFromMLIRFunction =
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using TranslateFunction = std::function<LogicalResult(
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llvm::SourceMgr &sourceMgr, llvm::raw_ostream &output, MLIRContext *)>;
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/// Use Translate[ToMLIR|FromMLIR]Registration as a global initialiser that
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/// Use Translate[ToMLIR|FromMLIR]Registration as a global initializer that
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/// registers a function and associates it with name. This requires that a
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/// translation has not been registered to a given name.
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///
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@ -151,7 +151,7 @@ LogicalResult MemRefRegion::unionBoundingBox(const MemRefRegion &other) {
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}
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/// Computes the memory region accessed by this memref with the region
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/// represented as constraints symbolic/parameteric in 'loopDepth' loops
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/// represented as constraints symbolic/parametric in 'loopDepth' loops
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/// surrounding opInst and any additional Function symbols.
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// For example, the memref region for this load operation at loopDepth = 1 will
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// be as below:
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@ -610,12 +610,12 @@ struct NDVectorTypeInfo {
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} // namespace
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// For >1-D vector types, extracts the necessary information to iterate over all
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// 1-D subvectors in the underlying llrepresentation of the n-D vecotr
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// 1-D subvectors in the underlying llrepresentation of the n-D vector
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// Iterates on the llvm array type until we hit a non-array type (which is
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// asserted to be an llvm vector type).
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static NDVectorTypeInfo extractNDVectorTypeInfo(VectorType vectorType,
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LLVMTypeConverter &converter) {
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assert(vectorType.getRank() > 1 && "extpected >1D vector type");
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assert(vectorType.getRank() > 1 && "expected >1D vector type");
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NDVectorTypeInfo info;
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info.llvmArrayTy =
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converter.convertType(vectorType).dyn_cast<LLVM::LLVMType>();
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@ -1239,7 +1239,7 @@ struct MemRefCastOpLowering : public LLVMLegalizationPattern<MemRefCastOp> {
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} else if (srcType.isa<MemRefType>() && dstType.isa<UnrankedMemRefType>()) {
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// Casting ranked to unranked memref type
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// Set the rank in the destination from the memref type
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// Allocate space on the stack and copy the src memref decsriptor
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// Allocate space on the stack and copy the src memref descriptor
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// Set the ptr in the destination to the stack space
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auto srcMemRefType = srcType.cast<MemRefType>();
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int64_t rank = srcMemRefType.getRank();
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@ -450,7 +450,7 @@ private:
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/// But we don't know the <id> for %val0 and %val1 yet. One way is to visit
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/// all the blocks twice and use the first visit to assign an <id> to each
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/// value. But it's paying the overheads just for OpPhi emission. Instead,
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/// we still visit the blocks once for emssion. When we emit the OpPhi
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/// we still visit the blocks once for emission. When we emit the OpPhi
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/// instructions, we use 0 as a placeholder for the <id>s for %val0 and %val1.
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/// At the same time, we record their offsets in the emitted binary (which is
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/// placed inside `functions`) here. And then after emitting all blocks, we
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@ -279,7 +279,7 @@ MLIRContext *OpPassManager::getContext() const {
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/// Return the operation name that this pass manager operates on.
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const OperationName &OpPassManager::getOpName() const { return impl->name; }
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/// Prints out the passes of the pass mangager as the textual representation
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/// Prints out the passes of the pass manager as the textual representation
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/// of pipelines.
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void OpPassManager::printAsTextualPipeline(raw_ostream &os) {
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// Filter out passes that are not part of the public pipeline.
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@ -178,7 +178,7 @@ Pass::Statistic::Statistic(Pass *owner, const char *name,
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// Always set the 'initialized' bit to true so that this statistic isn't
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// placed in the static registry.
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// TODO: This is sort of hack as `llvm::Statistic`s can't be setup to avoid
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// automatic registartion with the global registry. We should either add
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// automatic registration with the global registry. We should either add
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// support for this in LLVM, or just write our own statistics classes.
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Initialized = true;
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#endif
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@ -362,7 +362,7 @@ void LoopTiling::getTileSizes(ArrayRef<AffineForOp> band,
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// one possible approach. Or compute a polynomial in tile sizes and solve for
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// it.
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// For an n-d tilable band, compute n^th root of the excess.
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// For an n-d tileable band, compute n^th root of the excess.
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unsigned tSize =
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static_cast<unsigned>(floorl(std::pow(excessFactor, 1.0 / band.size())));
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// We'll keep a running product to determine the last tile size better.
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@ -933,7 +933,7 @@ static LogicalResult tryIsolateBands(const TileLoops &tileLoops) {
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TileLoops mlir::extractFixedOuterLoops(loop::ForOp rootForOp,
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ArrayRef<int64_t> sizes) {
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// Collect prefectly nested loops. If more size values provided than nested
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// Collect perfectly nested loops. If more size values provided than nested
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// loops available, truncate `sizes`.
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SmallVector<loop::ForOp, 4> forOps;
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forOps.reserve(sizes.size());
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@ -70,7 +70,7 @@ LogicalResult mlir::replaceAllMemRefUsesWith(Value *oldMemRef, Value *newMemRef,
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(void)oldMemRefRank; // unused in opt mode
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if (indexRemap) {
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assert(indexRemap.getNumSymbols() == symbolOperands.size() &&
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"symbolic operand count mistmatch");
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"symbolic operand count mismatch");
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assert(indexRemap.getNumInputs() ==
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extraOperands.size() + oldMemRefRank + symbolOperands.size());
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assert(indexRemap.getNumResults() + extraIndices.size() == newMemRefRank);
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@ -20,7 +20,7 @@ func @strided_memref(%ind: index) {
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// -----
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// This should not crash. The first operation cannot be converted, so the
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// secound should not match. This attempts to convert `return` to `llvm.return`
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// second should not match. This attempts to convert `return` to `llvm.return`
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// and complains about non-LLVM types.
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func @unknown_source() -> i32 {
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%0 = "foo"() : () -> i32
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@ -108,7 +108,7 @@ func @copy_transpose(%arg0: memref<?x?x?xf32, offset: ?, strides: [?, ?, 1]>, %a
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return
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}
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// CHECK-LABEL: func @copy
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// Tranpose input
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// Transpose input
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// CHECK: llvm.insertvalue {{.*}}[0] : !llvm<"{ float*, float*, i64, [3 x i64], [3 x i64] }">
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// CHECK: llvm.insertvalue {{.*}}[1] : !llvm<"{ float*, float*, i64, [3 x i64], [3 x i64] }">
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// CHECK: llvm.insertvalue {{.*}}[2] : !llvm<"{ float*, float*, i64, [3 x i64], [3 x i64] }">
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@ -36,7 +36,7 @@ spv.module "Logical" "GLSL450" {
|
|||
%0 = spv.ShiftLeftLogical %arg0, %arg1: i32, i16
|
||||
spv.ReturnValue %0 : i32
|
||||
}
|
||||
func @shift_right_aritmethic(%arg0: vector<4xi32>, %arg1 : vector<4xi8>) -> vector<4xi32> {
|
||||
func @shift_right_arithmetic(%arg0: vector<4xi32>, %arg1 : vector<4xi8>) -> vector<4xi32> {
|
||||
// CHECK: {{%.*}} = spv.ShiftRightArithmetic {{%.*}}, {{%.*}} : vector<4xi32>, vector<4xi8>
|
||||
%0 = spv.ShiftRightArithmetic %arg0, %arg1: vector<4xi32>, vector<4xi8>
|
||||
spv.ReturnValue %0 : vector<4xi32>
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
// RUN: mlir-opt %s -split-input-file -pass-pipeline='func(canonicalize)' | FileCheck %s
|
||||
|
||||
//===----------------------------------------------------------------------===//
|
||||
// spv.AccsessChain
|
||||
// spv.AccessChain
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
func @combine_full_access_chain() -> f32 {
|
||||
|
|
|
@ -927,7 +927,7 @@ func @shift_left_logical_invalid_result_type(%arg0: i32, %arg1 : i16) -> i16 {
|
|||
// spv.ShiftRightArithmetic
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
func @shift_right_aritmethic(%arg0: vector<4xi32>, %arg1 : vector<4xi8>) -> vector<4xi32> {
|
||||
func @shift_right_arithmetic(%arg0: vector<4xi32>, %arg1 : vector<4xi8>) -> vector<4xi32> {
|
||||
// CHECK: {{%.*}} = spv.ShiftRightArithmetic {{%.*}}, {{%.*}} : vector<4xi32>, vector<4xi8>
|
||||
%0 = spv.ShiftRightArithmetic %arg0, %arg1: vector<4xi32>, vector<4xi8>
|
||||
spv.ReturnValue %0 : vector<4xi32>
|
||||
|
|
|
@ -42,7 +42,7 @@ func @slice_depth1_loop_nest_with_offsets() {
|
|||
// -----
|
||||
|
||||
// Slices at loop depth 1 should only slice the loop bounds of the first loop.
|
||||
// Slices at loop detph 2 should slice loop bounds of both loops.
|
||||
// Slices at loop depth 2 should slice loop bounds of both loops.
|
||||
// CHECK-LABEL: func @slice_depth2_loop_nest() {
|
||||
func @slice_depth2_loop_nest() {
|
||||
%0 = alloc() : memref<100x100xf32>
|
||||
|
|
|
@ -916,10 +916,10 @@ def MixedVResultOp3 : TEST_Op<"mixed_variadic_out3",
|
|||
"Builder *builder, OperationState &state, IntegerAttr count",
|
||||
[{
|
||||
auto i32Type = builder->getIntegerType(32);
|
||||
state.addTypes(i32Type); // $ouput1
|
||||
state.addTypes(i32Type); // $output1
|
||||
SmallVector<Type, 4> types(count.getInt(), i32Type);
|
||||
state.addTypes(types); // $ouput2
|
||||
state.addTypes(types); // $ouput3
|
||||
state.addTypes(types); // $output2
|
||||
state.addTypes(types); // $output3
|
||||
state.addAttribute("count", count);
|
||||
}]>
|
||||
];
|
||||
|
|
|
@ -15,7 +15,7 @@
|
|||
// limitations under the License.
|
||||
// =============================================================================
|
||||
//
|
||||
// This file defines common utilities for generating documents from tablgen
|
||||
// This file defines common utilities for generating documents from tablegen
|
||||
// structures.
|
||||
//
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
|
Loading…
Reference in New Issue