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Force the greedy register allocator to always use the inline spiller. 

Soon, RegAllocGreedy will start splitting live ranges, and then deferred
spilling won't work anyway.

llvm-svn: 121591
This commit is contained in:
Jakob Stoklund Olesen 2010-12-10 22:54:44 +00:00
parent 276445f3b8
commit adecb5e82c
3 changed files with 8 additions and 7 deletions
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2
llvm/lib/CodeGen/RegAllocGreedy.cpp
View File

@ -311,7 +311,7 @@ bool RAGreedy::runOnMachineFunction(MachineFunction &mf) {
getAnalysis<LiveIntervals>());
ReservedRegs = TRI->getReservedRegs(*MF);
SpillerInstance.reset(createSpiller(*this, *MF, *VRM));
SpillerInstance.reset(createInlineSpiller(*this, *MF, *VRM));
allocatePhysRegs();
addMBBLiveIns(MF);

6
llvm/lib/CodeGen/Spiller.cpp
View File

@ -231,12 +231,6 @@ public:
} // end anonymous namespace
namespace llvm {
Spiller *createInlineSpiller(MachineFunctionPass &pass,
MachineFunction &mf,
VirtRegMap &vrm);
}
llvm::Spiller* llvm::createSpiller(MachineFunctionPass &pass,
MachineFunction &mf,
VirtRegMap &vrm) {

7
llvm/lib/CodeGen/Spiller.h
View File

@ -44,6 +44,13 @@ namespace llvm {
Spiller* createSpiller(MachineFunctionPass &pass,
MachineFunction &mf,
VirtRegMap &vrm);
/// Create and return a spiller that will insert spill code directly instead
/// of deferring though VirtRegMap.
Spiller *createInlineSpiller(MachineFunctionPass &pass,
MachineFunction &mf,
VirtRegMap &vrm);
}
#endif