Revert r249123 - [mips][microMIPS] Fix an issue with selecting sqrt instruction in LLVM backend

The author was not credited and most of the commit message is missing. Will re-commit with this fixed.

llvm-svn: 249415
This commit is contained in:
Daniel Sanders 2015-10-06 15:13:16 +00:00
parent 1ac26d06fe
commit add9057fa7
2 changed files with 5 additions and 15 deletions

View File

@ -353,8 +353,11 @@ def FNEG_S : MMRel, ABSS_FT<"neg.s", FGR32Opnd, FGR32Opnd, II_NEG, fneg>,
defm FABS : ABSS_M<"abs.d", II_ABS, fabs>, ABSS_FM<0x5, 17>;
defm FNEG : ABSS_M<"neg.d", II_NEG, fneg>, ABSS_FM<0x7, 17>;
def FSQRT_S : MMRel, StdMMR6Rel, ABSS_FT<"sqrt.s", FGR32Opnd, FGR32Opnd,
II_SQRT_S, fsqrt>, ABSS_FM<0x4, 16>, ISA_MIPS2;
let AdditionalPredicates = [NotInMicroMips] in {
def FSQRT_S : MMRel, ABSS_FT<"sqrt.s", FGR32Opnd, FGR32Opnd, II_SQRT_S, fsqrt>,
ABSS_FM<0x4, 16>, ISA_MIPS2;
}
defm FSQRT : ABSS_M<"sqrt.d", II_SQRT_D, fsqrt>, ABSS_FM<0x4, 17>, ISA_MIPS2;
// The odd-numbered registers are only referenced when doing loads,

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@ -1,13 +0,0 @@
; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -mattr=+micromips | FileCheck %s
; RUN: llc < %s -march=mips -mcpu=mips32r2 -mattr=+micromips | FileCheck %s
; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips | FileCheck %s
define float @sqrt_fn(float %value) #0 {
entry:
%sqrtf = tail call float @sqrtf(float %value) #0
ret float %sqrtf
}
declare float @sqrtf(float)
; CHECK: sqrt.s $f0, $f12