forked from OSchip/llvm-project
Attempt to fix failure in CodeGenOpenCL/atomic-ops.cl
llvm-svn: 310932
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@ -1,8 +1,8 @@
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// RUN: %clang_cc1 %s -cl-std=CL2.0 -emit-llvm -O0 -o - -triple=amdgcn-amd-amdhsa-opencl | FileCheck %s
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// RUN: %clang_cc1 %s -cl-std=CL2.0 -emit-llvm -O0 -o - -triple=amdgcn-amd-amdhsa-opencl | opt -instnamer -S | FileCheck %s
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// Also test serialization of atomic operations here, to avoid duplicating the test.
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// RUN: %clang_cc1 %s -cl-std=CL2.0 -emit-pch -O0 -o %t -triple=amdgcn-amd-amdhsa-opencl
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// RUN: %clang_cc1 %s -cl-std=CL2.0 -include-pch %t -O0 -triple=amdgcn-amd-amdhsa-opencl -emit-llvm -o - | FileCheck %s
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// RUN: %clang_cc1 %s -cl-std=CL2.0 -include-pch %t -O0 -triple=amdgcn-amd-amdhsa-opencl -emit-llvm -o - | opt -instnamer -S | FileCheck %s
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#ifndef ALREADY_INCLUDED
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#define ALREADY_INCLUDED
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@ -87,10 +87,10 @@ void fi5(atomic_int *i, int scope) {
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// CHECK: load atomic i32, i32 addrspace(4)* %{{.*}} syncscope("agent") seq_cst
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// CHECK: br label %atomic.scope.continue
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// CHECK: opencl_allsvmdevices:
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// CHECK: load atomic i32, i32 addrspace(4)* %{{.*}} seq_cst, align 4
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// CHECK: load atomic i32, i32 addrspace(4)* %{{.*}} seq_cst
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// CHECK: br label %atomic.scope.continue
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// CHECK: opencl_subgroup:
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// CHECK: %5 = load atomic i32, i32 addrspace(4)* %0 syncscope("subgroup") seq_cst, align 4
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// CHECK: load atomic i32, i32 addrspace(4)* %{{.*}} syncscope("subgroup") seq_cst
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// CHECK: br label %atomic.scope.continue
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// CHECK: atomic.scope.continue:
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int x = __opencl_atomic_load(i, memory_order_seq_cst, scope);
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@ -116,7 +116,7 @@ void fi6(atomic_int *i, int order, int scope) {
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// CHECK-NEXT: i32 4, label %[[ACQ_SUB:.*]]
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// CHECK-NEXT: ]
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// CHECK: seqcst:
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// CHECK: switch i32 %2, label %[[SEQ_ALL:.*]] [
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// CHECK: switch i32 %{{.*}}, label %[[SEQ_ALL:.*]] [
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// CHECK-NEXT: i32 1, label %[[SEQ_WG:.*]]
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// CHECK-NEXT: i32 2, label %[[SEQ_DEV:.*]]
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// CHECK-NEXT: i32 4, label %[[SEQ_SUB:.*]]
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